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Philips Semiconductors
ARM-based Microcontroller
Central Miscellaneous Status Register (CANMSR - 0xE004 0008)
Table 145: CAN Central Miscellaneous Status Register (CANMSR - 0xE004 0008)
CANMSR
Name
3:0
ES4:1
7:4
Reserved
11:8
BS4:1
31:12
Reserved
GLOBAL ACCEPTANCE FILTER
This block provides lookup for received Identifiers (called Acceptance Filtering in CAN terminology) for all the CAN Controllers.
It includes a 512 x 32 (2K byte) RAM in which software maintains one to five tables of Identifiers. This RAM can contain up to
1024 Standard Identifiers or 512 Extended Identifiers, or a mixture of both types.
If Standard (11-bit) Identifiers are used in the application, at least one of 3 tables in Acceptance Filter RAM must not be empty.
If the optional "fullCAN mode" is enabled, the first table contains Standard identifiers for which reception is to be handled in this
mode. The next table contains individual Standard Identifiers and the third contains ranges of Standard Identifiers, for which
messages are to be received via the CAN Controllers. The tables of fullCAN and individual Standard Identifiers must be
arranged in ascending numerical order, one per halfword, two per word. Since each CAN bus has its own address map, each
entry also contains the number of the CAN Controller (001-110) to which it applies.
31
29
15
13
Dis
Controller #
able
Figure 35: Entry in fullCAN and Individual Standard Identifier Tables
The table of Standard Identifier Ranges contains paired upper and lower (inclusive) bounds, one pair per word. These must also
be arranged in ascending numerical order.
31
29
26
dis
not
Controller #
able
used
The disable bits in Standard entries provide a means to turn response, to particular CAN Identifiers or ranges of Identifiers, on
and off dynamically. When the Acceptance Filter function is enabled, only the disable bits in Acceptance Filter RAM can be
changed by software. Response to a range of Standard addresses can be enabled by writing 32 zero bits to its word in RAM,
and turned off by writing 32 one bits (0xFFFF FFFF) to its word in RAM. Only the disable bits are actually changed. Disabled
entries must maintain the ascending sequence of Identifiers.
CAN Controllers and Acceptance Filter
Function
1: one or both of the Tx and Rx Error Counters has reached the limit set in the EWL
register (same as ES in CANGSR)
ES4:3 are available in LPC2294 only. In other parts these bits are reserved.
Reserved. User software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
1: the CAN controller is currently involved in bus activities (same as BS in CANGSR)
BS4:3 are available in LPC2294 only. In other parts these bits are reserved.
Reserved. User software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
26
10
not
used
Lower Identifier Bound
Figure 36: Entry in Standard Identifier Range Table
Identifier
16
10
dis
not
Controller #
able
used
205
Preliminary User Manual
LPC2119/2129/2292/2294
Reset Value
Upper Identifier Bound
May 03, 2004
0
NA
0
NA
16
0
0
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