Figure 3.3 Reset Operation By A Reset_N Pin (2) - Toshiba TXZ+ TMPM4MNFYAFG Reference Manual

32-bit risc microcontroller, clock control and operation mode
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In case of RESET_N pin input change from "Low" to "High" before "Internal initialization time" elapses, internal
reset signal is released after "Internal initialization time" elapses.
Please goes up a supply voltage into an operating voltage range before "Internal initialization time" elapses. The
CPU operates after internal reset release.
Operating Voltage range
LVD Release
Voltage
(V
)
LVL0
PORF release
Voltage
(V
)
PREL
POR release
Voltage
(V
)
PREL
0V
RESET_N pin
LVD reset
Internal reset
Power slope
LVD detection release time(t
Internal initialization time(

Figure 3.3 Reset operation by a RESET_N pin (2)

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Clock Control and Operation Mode
DVDD5=DVDD5A=DVDD5B=AVDD5
(V
)
PON
)
VDDT2
t
)
IINIT
TXZ+ Family
TMPM4M Group(1)
DVDD5
CPU Operation start
2022-06-24
Rev. 1.1

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