Table 25 Ultra Dma Cycle Timings (Host Terminating Write); Figure 16 Ultra Dma Cycle Timing Chart (Host Terminating Write) - Hitachi CinemaStar P7K500 Specifications

5.2.4.8
Host Terminating Write DMA
DMARQ
DMACK-
STOP
DDMARDY-
HSTROBE
DD(15:00)

Figure 16 Ultra DMA cycle timing chart (Host Terminating Write)

PARAMETER
DESCRIPTION
(all values in ns)
Time from
HSTROBE to
tSS
edge assertion of
STOP
Limited interlock
tLI
time
Interlock time with
tMLI
minimum
CRC word setup
tCS time (at device
side)
CRC word hold
tCH
time (at device
side)
Hold time for
tACK
DMACK–
Maximum time
tIORDYZ before releasing
IORDY

Table 25 Ultra DMA cycle timings (Host Terminating Write)

HITACHI Deskstar & CinemaStar P7K500 Hard Disk Drive specification (Rev 1.1)
tLI
tSS
tLI
tLI
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MODE0 MODE1 MODE2
MIN MAX MIN MAX MIN
50 – 50 – 50
0 150 0 150 0
20 – 20 – 20
15 – 10 – 7
5 – 5 – 5
20 – 20 – 20
– 20 – 20 –
33
tMLI
tCS
Host drives DD
MODE3 MODE4
MAX MIN MAX MIN MAX
– 50 – 50 –
150 0 100 0 100
– 20 – 20 –
– 7 – 5 –
– 5 – 5 –
– 20 – 20 –
20 – 20 – 20
tACK
tIORDYZ
tACK
tCH
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CRC
MODE5 MODE6
MIN MAX MIN MAX
50 – 50 –
0 75 0 60
20 – 20 –
5 – 5 –
5 – 5 –
20 – 20 –
– 20 – 20