5.2.4.3
Host Terminating Read DMA
DMARQ
DMACK-
STOP
HDMARDY-
DSTROBE
DD(15:00)
Figure 11 Ultra DMA cycle timing chart (Host terminating Read)
PARAMETER
DESCRIPTION
(all values in ns)
HDMARDY–
to
tRFS
DSTROBE time
tRP
Ready to pause time
tLI
Limited interlock time
Maximum time allowed for
tAZ
output drivers to release
Minimum
delay
tZAH
required for output
Interlocking
time
tMLI
minimum
CRC word setup time (at
tCS
device side)
CRC word hold time (at
tCH
device side)
tACK
Hold time for DMACK –
Maximum
time
tIORDYZ
releasing IORDY
Table 20 Ultra DMA cycle timings (Host terminating Read)
HITACHI Deskstar & CinemaStar P7K500 Hard Disk Drive specification (Rev 1.1)
tLI
tRP
tLI
tRFS
xxx RD Data
xxxxxxxxxxxxxxxxxx
Device drives DD
MODE0
MODE1
MIN
MAX
MIN
MAX
final
–
75
–
70
160
–
125
0
150
0
150
–
10
–
10
time
20
–
20
with
20
–
20
15
–
10
5
–
5
20
–
20
before
–
20
–
20
28
tMLI
tCS
tAZ
xxx
tZAH
Host drives DD
MODE2
MODE3
MIN
MAX
MIN
MAX
–
60
–
60
–
100
–
100
–
0
150
0
100
–
10
–
10
–
20
–
20
–
–
20
–
20
–
–
7
–
7
–
–
5
–
5
–
–
20
–
20
–
–
20
–
20
tACK
tACK
tIORDYZ
tCH
xxxxxxxxxx
CRC
MODE4
MODE5
MODE6
MIN
MAX
MIN
MAX
MIN
–
60
–
50
–
100
–
85
–
85
0
100
0
75
0
–
10
–
10
–
20
–
20
–
20
20
–
20
–
20
5
–
5
–
5
5
–
5
–
5
20
–
20
–
20
–
20
–
20
–
MAX
50
–
60
10
–
–
–
–
–
20