Toshiba TXZ+ Series Reference Manual page 24

Table 1.7 Block operation status in each Low Power Consumption mode
Block
Processor core (Debug included)
DMAC
Pin state
I/O port
Register
ADC
DAC
COMP
UART
I2C
EI2C
TSPI
A-PMD
A-ENC
T32A
LCD
TRGSEL
CRC
RTC
RMC
SIWDT
LVD
OFD
TRM
CG
PLL
RAMP (RAM parity)
External high speed oscillator (EHOSC)
Built-in high speed oscillator 1 (IHOSC1)
Built-in high speed oscillator 2 (IHOSC2)
External low speed oscillator (ELOSC)
RLM
Code flash
Data flash
RAM
Backup RAM
: operation is possible.
-: if it shifts to the object mode, the clock to a peripheral circuit stops automatically.
×: If it shifts to the object mode, the electric supply source to a module intercepts automatically. When
returning, initialized by the reset.
Note1: Check that the peripheral function is not running and change to STOP 2 mode.
Note2: It's in the protected mode A only. In other case, Stop SIWDT before shifting to the IDLE mode.
NORMAL IDLE

-
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

 (Note 2)
 
 

Unavailable
 
 
 
 
 
 
 
 
Access
Access
Possible
Possible
(Note5)
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Clock Control and Operation Mode
STOP1
ELOSC ELOSC
On Off
- -
- -
 
- -
- -
- -
- -
- -
- -
(Note 3) (Note 3)
- -
(Note 3) (Note 3)
- -
- -
- -
- -

-
- -
- -

-

-
- -
 
- -
- -
 
- -
- -
- -
- -
- -

-
 
Data Data
hold hold
TXZ+ Family
TMPM3H Group(1)
STOP2 (Note1)
ELOSC ELOSC
On Off
× ×
× ×
 
(Note4) (Note4)
× ×
× ×
× ×
× ×
× ×
× ×
(Note 3) (Note 3)
× ×
(Note 3) (Note 3)
× ×
× ×
× ×
× ×

-
× ×
× ×

-
× ×
× ×
 
× ×
× ×
× ×
× ×
× ×
× ×
× ×
× ×

-
 
Data Data
Hold Hold
× ×
Data hold Data hold
2022-05-10
Rev. 1.3