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(3) Various signals
Figure 15-34 shows RELT and CMDT operations.
SO0 Latch
RELT
CMDT
(4) Transfer start
Serial transfer is started by setting transfer data to the serial I/O shift register 0 (SIO0) when the following two
conditions are satisfied.
• Serial interface channel 0 operation control bit (CSIE0)= 1
• Internal serial clock is stopped or SCK0 is at high level after 8-bit serial transfer.
Cautions 1. If CSIE0 is set to "1" after data write to SIO0, transfer does not start.
Upon termination of 8-bit transfer, serial transfer automatically stops and the interrupt request flag (CSIIF0) is
set.
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CHAPTER 15 SERIAL INTERFACE CHANNEL 0 ( µ PD78014 Subseries)
Figure 15-34. RELT and CMDT Operations
2. Because the N-ch open-drain output must be set to high-impedance for data reception,
write FFH to SIO0 in advance.
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