IP 265
Edge flag (trigger)
Set/Reset operation
Edge flag "EF":
The language element has one binary input (C) and
one binary output (Q).
Each rising input signal edge sets the output to "1"
for the duration of one internal clock pulse (128 kHz).
Each falling input signal edge can set output Q to "1"
for the duration of one internal clock pulse (128 kHz)
when you invert input C.
Example:
When input I 0.0 goes from "0" to "1",
connector KON1 is set for a period of
7.8 µs.
In IP 265 CSFs, the edge flag is an explicit language element. In STEP 5 (SIMATIC CPU program-
ming), an edge flag is implemented by the use of flags and the interconnection of several language
elements.
Possible options for edge flags:
•
The input can be inverted.
The output can be inverted when it leads immediately to the control system flowchart's output
•
bar.
•
Edge flag "EF" can be converted into type-conforming language elements "2:1", "D-FF" and
"Clock pulse".
EWA 4NEB 812 6130-02a
Programming the IP 265 with COM 265
Table 9-5. Edge flag
Signal states
1
0
1
0
t:
CSF (example)
EF
>
I 0.0
C
Q
Timing diagram
t
1
kHz=7.8 µs
/
128
#KON1
I 0.0
#KON1
t
Time
in ms
9-15