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A
B
C
SCHEMATIC DIAGRAMS
MAIN 1/3
1
MAIN (1)
2
0
0
5.2
0
CB203
37.0
12.3
3
0
12.3
12.3
0
0
-12.8
0
0
5.2
Page 48
M4
0
to POWER_CB3
4
5
6
7
8
9
POINT A XL200 (Pin 9 of IC204)
POINT B 1 / IC205 (2 pin), 2 / IC205 (1 pin)
IC205
1
(2 pin)
10
IC205
2
(1 pin)
POWER ON
D
E
F
11.4
9.0
11.4
9.6
11.4
9.7
0
30.1
37.0
30.7
0
37.0
12.3
12.3
7.7
30.7
12.3
8.3
0
0
8.3
0
4.8
0
0
12.3
12.3
12.3
8.0
8.6
0
0
12.2
12.3
8.6
0
0
-8.5
-12.8
12.3
-8.5
-12.8
-12.8
-7.9
0
3.8
0
IC205
1
(2 pin)
IC205
2
(1 pin)
POWER OFF
POWER OFF
G
H
I
Page 46
F1
To BD module P.C.B.
to MAIN (2)_CB803
0
0.4
IC204: R5F21356ANFP
Page 46
B5
Single chip 16 bit microprocessor
To BD module P.C.B.
to MAIN (2)_CB401
8
8
8
I/O ports
Port P0
Port P1
Port P2
Peripheral functions
UART or
Timers
clock synchronous serial I/O
(8 bits x 3)
Timer RA (8 bits x 1)
Timer RB (8 bits x 1)
2
Timer RC (16 bits x 1)
I
C bus or SSU
(8 bits x 1)
Timer RD (16 bits x 2)
Timer RE (8 bits x 1)
IC205: BD5242G
Voltage detector IC
LIN module
Watchdog timer
Comparator B
V
DD
(14 bits)
2
A/D converter
(10 bits x 12 channels)
1
Vout
D/A converter
(8 bits x 2)
R8C microprocessor core
–
+
R0H
R0L
R1H
R1L
Vref
N.C.
R2
4
R3
A0
3
5
A1
FB
GND
CT
J
K
Page 46
E3
to MAIN (2)_CB800
5.3
5.3
0
4.8
2.6
2.6
IC204
0
1.0
IC203
MAIN MICRO-
5.1
IC203
0
PROCESSOR
IC203
5.2
IC203
5.2
A
5.3
IC203
0
IC203
Page 47
B4
8
5
1
2
8
to MAIN (3)_CB600
Port P3
Port P4
Port P5
Port P6
System clock
generation circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
Low-speed on-chip oscillator
for watchdog timer
Voltage detection circuit
Comparator A
DTC
Memory
SB
ROM
(1)
USP
ISP
RAM
(2)
INTB
PC
FLG
Multiplier
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
L
M
N
BD-940
To BD module P.C.B.
0
5.3
0
5.3
0
0
0
5.2
0
1.1
5.2
1.1
1.2
0
5.3
0
0
IC205
5.3
5.3
2
B
1
RESET IC
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★ Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
45
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