HP 5065A Operating And Service Manual page 274

Model 5065A
Circuit Diagrams, Theory, and Maintenance
PHASE DETECTOR ASSEMBLY A8 THEORY
Separate functions in A8 Phase Detector Assembly are
shown in the A8 block diagram. The two basic circuits
in this assembly are the modulation reference oscillator
and the 137 Hz phase detector.
The reference oscillator is a phase shift oscillator pro­
ducing a 274 Hz sine wave output. This signal is
shaped in a Schmitt trigger for driving a frequency
divider. The frequency divider output is a 137 Hz square
wave applied to a phase shifter and phase detector. The
phase shifter filters the square wave and provides a
137 Hz signal with very low 2nd Harmonic content to A3
Multiplier Assembly to modulate the 5 MHz quartz oscil­
lator signal.
The phase detector produces a dc voltage proportional
to the error signal received from Ac Amplifier Assembly
A7. This dc output is applied to A9 Operational
Amplifier.
Reference oscillator Q1, Q2, Q3 is a phase shift
oscillator which operates at 274 Hz. The frequency is
determined by C1, C3, R4, R7, and R8 with R8 providing
a fine frequency adjustment. These components com­
plete the positive feedback loop from Q3 to Q1 to
maintain oscillation. A second feedback loop through
CR1, CR2, R5, R6, and C2 provides negative feedback
for amplitude limiting.
The 274 Hz signal at Q3 emitter is fed to a Schmitt
trigger circuit Q4, Q5, and associated components. This
circuit is a shaping circuit with very fast rise and fall
times. Capacitor C7 bypasses R14 to couple fast voltage
changes from Q4 collector to Q5 base. Either Q4 or Q5
conducts,^the negative-going transition at its collector
is supplied to the frequency divider (-: 2) circuit. The
network composed of C8, CR3, C11, R18, and R20 en­
sures that only negative pulses are fed to the frequency
divider.
Frequency divider Q6, Q7 is a binary divider producing
an output pulse after receiving two input pulses from
Q5. A negative pulse from Q5 is applied to Q6 or Q7
base through gating diodes CR4 or CR5. This negative
pulse turns off the conducting transistor. Capacitor C13
provides filtering for Q6, Q7 emitters and R25 estab­
lishes a small voltage at the common emitter junction to
ensure that one of the two transistors is cut off.
The phase shift network includes Q8, Q9, and associated
components, and allows phase adjustment of the 137
Hz sine wave. This phase shift is necessary to establish
the correct relationship between the modulating 137 Hz
and the 137 Hz reference sent to the phase detector.
Phase adjustment control R43 provides the phase
adjustment. Because the signals driving transistors
Q8 and Q9 are symmetrical square waves, second har­
monic content is very low (zero for perfect symmetry).
8-44
Components R45, C24, R47, and C25 provide low pass
filtering. The signal output is a 137 Hz sine wave with ^
second harmonic distortion at least 80 dB below the
signal level.
Phase detector Q12A, B, and associated components
receive two inputs: (1) the 137 Hz reference square
wave through Q10 and Q11 and, (2) the error signal _
from Ac Amplifier Assembly A7. The output is a dc
error signal supplied to Operational Amplifier A9.
Emitter followers Q10 and Q11 drive the phase detector.
Transistors Q12A, B are alternately turned on and off by „
the 137 Hz reference square wave. The ac error signal
is applied to T1 secondary. The phase detector output
at T1 primary center tap is the dc error signal which
goes to A9 Operational Amplifier. Potentiometer R35 —
is a dc zero adjustment.
Q11 output is integrated to a triangular wave by R42
and C21 for an oscilloscope signal atTP2. This signal ~~
can be used to check Q11 square wave output.
A8 MAINTENANCE
NORMAL OPERATION
Phase detector circuits provide the following outputs: _
a. 130 to 142 Hz, 80 to 250 mV peak-to-peak sine
wave to A3J1. This is phase modulation to A3 Multiplier
Assembly. —
b. 130 to 142 Hz, 1.5 to 2.1 V peak-to-peak tri­
angular wave at A8TP2.
c. Dc error signal outputs at A8(11), A8(14), and
A8TP3 which are used by A17 and A9.
NOTE
When 5065A is operating normally (Atomic ~
loop closed) the error signal at A8(14) is
very small (mostly noise).
OPERATIONAL CHECK
To determine if Phase Detector Assembly is operating
normally perform the following checks:
a. Operation mode of 5065A is not important for _
this check. Connect an oscilloscope vertical input to
A8(9). Waveform should be as in 8.
b. Set FUNCTION switch to OPER. Connect a fre­
quency counter to A8TP2. Frequency should be between
130 to 142 Hz. Do not adjust frequency if these limits —
are met. If frequency is outside 130 to 142 Hz adjust
A8R8 for 137 Hz.