ABB Network Partner AB
Version 1.0-00
TEST
TEST-ACTIVE
BLOCK-TRIP
TRIP-EXTTRIP
TRIP-BLOCK
OPERATION=OFF
L1TRIP
L2TRIP
L3TRIP
TRIP-PTPTRIP
Tripping logic
&
1
150ms
1
2000ms
t
1
150ms
1
2000ms
t
1
150ms
1
2000ms
t
1
Fig. 3
1
&
1
&
1
&
Tripping logic circuits—simplified logic diagram
1MRK 580 120-XEN
&
1
&
1
&
1
&
1
&
&
1
Delay loop
10ms
t
&
Page
5 - 5
TRIP-TRIPL1
TRIP-TRIPL2
TRIP-TRIPL3
TRIP-GTRIP
TRIP-TPTRIP
TRIP-SPTRIP
(X80120-3)