NEC PD78056Y Manuals

Manuals and User Guides for NEC PD78056Y. We have 1 NEC PD78056Y manual available for free PDF download: User Manual

NEC PD78056Y User Manual (603 pages)

PD78054 Series; PD78054Y Series 8-BIT SINGLE-CHIP MICROCONTROLLERS

Brand: NEC | Category: Computer Hardware | Size: 3.42 MB

Table of Contents
17
CHAPTER 1 GENERAL ( PD78054 Subseries)

37
- Features
  
  37
- Applications
  
  38
- Ordering Information
  
  38
- Quality Grade
  
  39
- Pin Configuration (Top View)
  
  40
- Series Expansion
  
  43
- Block Diagram
  
  45
- Outline of Function
  
  46
- Differences between Standard Quality Grade Products and (A) Products
  
  48
- Mask Options
  
  48
  - Mask Options of Mask ROM Versions
    48
CHAPTER 2 GENERAL ( PD78054Y Subseries)

49
- Features
  
  49
- Applications
  
  50
- Ordering Information
  
  50
- Quality Grade
  
  50
- Pin Configuration (Top View)
  
  51
- Series Expansion
  
  54
- Block Diagram
  
  56
- Outline of Function
  
  57
- Mask Options
  
  58
CHAPTER 3 PIN FUNCTION ( PD78054 Subseries)

59
- Pin Function List
  
  59
  - Normal Operating Mode Pins
    59
  - PROM Programming Mode Pins (PROM Versions Only)
    63
- Description of Pin Functions
  
  64
  - P00 to P07 (Port 0)
    64
  - P10 to P17 (Port 1)
    65
  - P20 to P27 (Port 2)
    65
  - P30 to P37 (Port 3)
    66
  - P40 to P47 (Port 4)
    67
  - P50 to P57 (Port 5)
    67
  - P60 to P67 (Port 6)
    67
  - P70 to P72 (Port 7)
    68
  - P120 to P127 (Port 12)
    69
  - P130 and P131 (Port 13)
    69
  - Av Ref0
    69
  - Av Ref1
    69
  - Av DD
    70
  - Av Ss
    70
  - Reset
    70
  - X1 and X2
    70
  - XT1 and XT2
    70
  - VDD
    70
  - Vss
    70
  - PP (PROM Versions Only)
    70
  - IC (Mask ROM Version Only)
    70
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  71
  - Pin Input/Output Circuit Types
    71
  - Pin Input/Output Circuit of List
    73
CHAPTER 4 PIN FUNCTION ( PD78054Y Subseries)

75
- Pin Function List
  
  75
  - Normal Operating Mode Pins
    75
  - PROM Programming Mode Pins (PROM Versions Only)
    79
- Description of Pin Functions
  
  80
  - P00 to P07 (Port 0)
    80
  - P10 to P17 (Port 1)
    81
  - P20 to P27 (Port 2)
    81
  - P30 to P37 (Port 3)
    82
  - P40 to P47 (Port 4)
    82
  - P50 to P57 (Port 5)
    83
  - P60 to P67 (Port 6)
    83
  - P70 to P72 (Port 7)
    84
  - P120 to P127 (Port 12)
    84
  - P130 and P131 (Port 13)
    85
  - Av Ref0
    85
  - Av Ref1
    85
  - Av DD
    85
  - Av Ss
    85
  - Reset
    85
  - X1 and X2
    86
  - XT1 and XT2
    86
  - VDD
    86
  - Vss
    86
  - PP (PROM Versions Only)
    86
  - IC (Mask ROM Version Only)
    86
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  87
  - Pin Input/Output Circuit Types
    87
  - Pin Input/Output Circuit of List
    89
Chapter 5 Cpu Architecture

91
- Memory Spaces
  
  91
- Processor Registers
  
  109
  - Control Registers
    109
  - Program Counter Configuration
    109
  - Program Status Word Configuration
    109
  - Internal High-Speed RAM Area
    110
  - Data to be Reset from Stack Memory
    111
    
    Correspondent Table of Absolute Addresses in the General Registers
    112
    
    General Registers
    112
  - Data to be Saved to Stack Memory
    111
  - Stack Pointer Configuration
    111
  - General Register Configuration
    113
    
    Special Function Register (SFR)
    114
  - Special-Function Register List
    115
- Instruction Address Addressing
  
  118
  - Relative Addressing
    118
  - Immediate Addressing
    119
  - Table Indirect Addressing
    120
  - Register Addressing
    120
- Operand Address Addressing
  
  121
  - Implied Addressing
    121
  - Register Addressing
    122
  - Direct Addressing
    123
  - Short Direct Addressing
    124
  - Special-Function Register (SFR) Addressing
    125
  - Register Indirect Addressing
    126
  - Based Addressing
    127
  - Based Indexed Addressing
    128
  - Stack Addressing
    128
Chapter 6 Port Functions

129
- Port Functions
  129
- Port Types
  129
- Port Functions ( PD78054 Subseries)
  130
- Port Functions ( PD78054Y Subseries)
  132
- Port Configuration
  
  134
  - Port 0
    134
  - P00 and P07 Block Diagram
    135
  - P01 to P06 Block Diagram
    135
    
    Port 1
    136
  - P10 to P17 Block Diagram
    136
    
    Port 2 ( PD78054 Subseries)
    137
  - P20, P21, P23 to P26 Block Diagram
    137
  - P22 and P27 Block Diagram
    138
    
    Port 2 ( PD78054Y Subseries)
    139
  - P20, P21, P23 to P26 Block Diagram
    139
  - P22 and P27 Block Diagram
    140
    
    Port 3
    141
  - P30 to P37 Block Diagram
    141
    
    Block Diagram of Falling Edge Detection Circuit
    142
    
    Port 4
    142
    
    Port 5
    143
  - P40 to P47 Block Diagram
    142
  - P50 to P57 Block Diagram
    143
    
    Port 6
    144
  - P60 to P63 Block Diagram
    145
  - P64 to P67 Block Diagram
    145
    
    Port 7
    146
  - P70 Block Diagram
    146
  - P71 and P72 Block Diagram
    147
    
    Port 12
    148
  - P120 to P127 Block Diagram
    148
    
    Port 13
    149
  - P130 and P131 Block Diagram
    149
- Port Function Control Registers
  
  150
- Port Function Operations
  
  156
- Selection of Mask Option
  
  157
Chapter 7 Clock Generator

159
Chapter 8 16-Bit Timer/Event Counter

175
Chapter 9 8-Bit Timer/Event Counters 1 and 2

215
Chapter 10 Watch Timer

241
- Watch Timer Functions
  
  241
  - Interval Timer Interval Time
    241
- Watch Timer Configuration
  
  242
- Watch Timer Control Registers
  
  242
- Watch Timer Operations
  
  246
  - Watch Timer Operation
    246
  - Interval Timer Operation
    246
  - Interval Timer Interval Time
    246
Chapter 11 Watchdog Timer

247
- Watchdog Timer Functions
  
  247
  - Watchdog Timer Runaway Detection Times
    247
  - Interval Times
    248
- Watchdog Timer Configuration
  
  249
  - Watchdog Timer Block Diagram
    249
- Watchdog Timer Control Registers
  
  250
  - Timer Clock Select Register 2 Format
    251
  - Watchdog Timer Mode Register Format
    252
- Watchdog Timer Operations
  
  253
  - Watchdog Timer Operation
    253
  - Watchdog Timer Runaway Detection Times
    253
    
    Interval Timer Interval Time
    254
    
    Interval Timer Operation
    254
Chapter 12 Clock Output Control Circuit

255
Chapter 13 Buzzer Output Control Circuit

261
Chapter 14 A/D Converter

265
Chapter 15 D/A Converter

281
- D/A Converter Functions
  
  281
- D/A Converter Configuration
  
  282
  - D/A Converter Block Diagram
    282
- D/A Converter Control Registers
  
  284
  - D/A Converter Mode Register Format
    284
- Operations of D/A Converter
  
  285
- Cautions Related to D/A Converter
  
  286
  - Use Example of Buffer Amplifier
    286
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( PD78054 Subseries)

287
- Differences between Channels 0, 1, and 2
  287
- Serial Interface Channel 0 Functions
  
  288
  - Serial Bus Interface (SBI) System Configuration Example
    289
- Serial Interface Channel 0 Configuration
  
  290
  - Serial Interface Channel 0 Block Diagram
    291
- Serial Interface Channel 0 Control Registers
  
  294
- Serial Interface Channel 0 Operations
  
  301
  - Operation Stop Mode
    301
  - 3-Wire Serial I/O Mode Operation
    302
    
    RELT and CMDT Operations
    305
    
    Wire Serial I/O Mode Timings
    305
    
    Circuit of Switching in Transfer Bit Order
    306
  - SBI Mode Operation
    307
  - Example of Serial Bus Configuration with SBI
    307
  - SBI Transfer Timings
    309
  - Bus Release Signal
    310
  - Command Signal
    310
  - Addresses
    311
  - Slave Selection with Address
    311
  - Commands
    312
  - Data
    312
  - Acknowledge Signal
    313
  - BUSY and READY Signals
    314
  - RELT and CMDD Operations (Slave)
    319
  - RELT, CMDT, RELD, and CMDD Operations (Master)
    319
  - ACKT Operation
    320
  - ACKE Operations
    321
  - ACKD Operations
    322
  - BSYE Operation
    322
  - Various Signals in SBI Mode
    323
  - Pin Configuration
    325
  - Address Transmission from Master Device to Slave Device (WUP = 1)
    327
  - Command Transmission from Master Device to Slave Device
    328
  - Data Transmission from Master Device to Slave Device
    329
  - Data Transmission from Slave Device to Master Device
    330
    
    2-Wire Serial I/O Mode Operation
    333
  - Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    333
  - Wire Serial I/O Mode Timings
    337
  - RELT and CMDT Operations
    338
    
    SCK0/P27 Pin Configuration
    339
    
    SCK0/P27 Pin Output Manipulation
    339
CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( PD78054Y Subseries)

341
- Differences between Channels 0, 1, and 2
  341
- Serial Interface Channel 0 Functions
  
  342
- Serial Interface Channel 0 Configuration
  
  344
  - Serial Interface Channel 0 Block Diagram
    345
  - Serial Interface Channel 0 Interrupt Request Signal Generation
    347
- Serial Interface Channel 0 Control Registers
  
  348
- Serial Interface Channel 0 Operations
  
  356
  - Operation Stop Mode
    356
  - 3-Wire Serial I/O Mode Operation
    357
  - RELT and CMDT Operations
    359
  - Wire Serial I/O Mode Timings
    359
  - Circuit of Switching in Transfer Bit Order
    360
    
    2-Wire Serial I/O Mode Operation
    361
  - Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    361
  - Wire Serial I/O Mode Timings
    365
  - RELT and CMDT Operations
    366
    
    I 2 C Bus Mode Operation
    367
  - Address
    369
  - Start Condition
    369
  - Transfer Direction Specification
    369
  - Acknowledge Signal
    370
  - Stop Condition
    370
  - Wait Signal
    371
  - Pin Configuration
    377
  - Data Transmission from Master to Slave (both Master and Slave Selected 9-Clock Wait)
    379
  - Data Transmission from Slave to Master (both Master and Slave Selected 9-Clock Wait)
    383
    
    Cautions on Use of I C Bus Mode
    385
  - Start Condition Output
    385
  - Slave Wait Release (Transmission)
    386
  - Slave Wait Release (Reception)
    387
    
    Restrictions in I 2 C Bus Mode
    388
    
    SCK0/SCL/P27 Pin Configuration
    390
    
    SCK0/SCL/P27 Pin Output Manipulation
    390
  - Logic Circuit of SCL Signal
    391
Chapter 18 Serial Interface Channel 1

393
Chapter 19 Serial Interface Channel 2

439
Chapter 20 Real-Time Output Port

477
Chapter 21 Interrupt and Test Functions

483
Chapter 22 External Device Expansion Function

511
Chapter 23 Standby Function

525
- Standby Function and Configuration
  
  525
- Standby Function Operations
  
  527
  - HALT Mode
    527
  - HALT Mode Clear Upon Interrupt Request Generation
    528
  - HALT Mode Release by RESET Input
    529
  - Operation after HALT Mode Release
    529
    
    STOP Mode
    530
  - STOP Mode Release by Interrupt Request Generation
    531
  - Operation after STOP Mode Release
    532
  - Release by STOP Mode RESET Input
    532
Chapter 24 Reset Function

533
Chapter 25 Rom Correction

537
- ROM Correction Functions
  
  537
- ROM Correction Configuration
  
  537
  - Block Diagram of ROM Correction
    537
  - Correction Address Registers 0 and 1 Format
    538
- ROM Correction Control Registers
  
  539
  - Correction Control Register Format
    539
- ROM Correction Application
  
  540
- ROM Correction Example
  
  543
- Program Execution Flow
  
  544
  - Program Transition Diagram (When One Place Is Corrected)
    544
  - Program Transition Diagram (When Two Places Are Corrected)
    545
- Cautions on ROM Correction
  
  546
  - Pd78P054, 78P058
    547
Chapter 26 Pd78P054, 78P058

547
Chapter 27 Instruction Set

561
- Legends Used in Operation List
  
  562
- Operation List
  
  564
- Instructions Listed by Addressing Type
  
  572
Appendix A Differences between Pd78054, 78054Y Subseries and Pd78058F, 78058Fy Subseries

577
- A-1. Major Differences between PD78054, 78054Y Subseries and PD78058F, 78058FY Subseries
  578
APPENDIX A DIFFERENCES between Μpd78054, 78054Y SUBSERIES and

579
Appendix B Development Tools

579
- B-1. Development Tool Configuration
  580
- Language Processing Software
  
  582
- PROM Writing Tools
  
  584
  - Hardware
    584
  - Software
    584
    
    B.2.1 Hardware
    584
    
    B.2.2 Software
    584
- Debugging Tools
  
  585
  - Hardware
    585
    
    B.3 Debugging Tools
    585
    
    B.3.1 Hardware
    585
  - Software
    587
  - B.3.2 Software
    587
- OS for IBM PC
  
  589
- Upgrading Former In-Circuit Emulators for 78K/0 Series to IE-78001-R-A
  
  589
Appendix C Embedded Software

593
Appendix D Register Index

595
- Register Index
  
  595
Appendix E Revision History

599

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NEC PD78056Y Manuals

NEC PD78056Y User Manual (603 pages)

Table of Contents

CHAPTER 1 GENERAL ( PD78054 Subseries)

Features

Applications

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Differences between Standard Quality Grade Products and (A) Products

Mask Options

CHAPTER 2 GENERAL ( PD78054Y Subseries)

Features

Applications

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Mask Options

CHAPTER 3 PIN FUNCTION ( PD78054 Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

CHAPTER 4 PIN FUNCTION ( PD78054Y Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

Chapter 5 Cpu Architecture

Memory Spaces

Processor Registers

Instruction Address Addressing

Operand Address Addressing

Chapter 6 Port Functions

Port Configuration

Port Function Control Registers

Port Function Operations

Selection of Mask Option

Chapter 7 Clock Generator

Clock Generator Functions

Clock Generator Configuration

Clock Generator Control Register

System Clock Oscillator

Clock Generator Operations

Changing System Clock and CPU Clock Settings

Chapter 8 16-Bit Timer/Event Counter

Outline of Timers Incorporated in the PD78054, 78054Y Subseries

16-Bit Timer/Event Counter Functions

16-Bit Timer/Event Counter Configuration

16-Bit Timer/Event Counter Control Registers

16-Bit Timer/Event Counter Operations

16-Bit Timer/Event Counter Operating Precautions

Chapter 9 8-Bit Timer/Event Counters 1 and 2

8-Bit Timer/Event Counters 1 and 2 Functions

8-Bit Timer/Event Counters 1 and 2 Configurations

8-Bit Timer/Event Counters 1 and 2 Control Registers

8-Bit Timer/Event Counters 1 and 2 Operations

Cautions on 8-Bit Timer/Event Counters 1 and 2

Chapter 10 Watch Timer

Watch Timer Functions

Watch Timer Configuration

Watch Timer Control Registers

Watch Timer Operations

Chapter 11 Watchdog Timer

Watchdog Timer Functions

Watchdog Timer Configuration

Watchdog Timer Control Registers

Watchdog Timer Operations

Chapter 12 Clock Output Control Circuit

Clock Output Control Circuit Functions

Clock Output Control Circuit Configuration

Clock Output Function Control Registers

Chapter 13 Buzzer Output Control Circuit

Chapter 14 A/D Converter

A/D Converter Functions

A/D Converter Configuration