Analog Devices AD9361 Manuals

Analog Devices AD9361 Manuals

Manuals and User Guides for Analog Devices AD9361. We have 1 Analog Devices AD9361 manual available for free PDF download: Reference Manual

Analog Devices AD9361 Reference Manual

Analog Devices AD9361 Reference Manual (128 pages)

Brand: Analog Devices | Category: Motherboard | Size: 2.13 MB

Table of Contents

General Information
1
Table of Contents
2
Revision History
4
Introduction
5
- Terminology
  5
- Register and Bit Syntax
  5
Initialization and Calibration
6
Reference Clock Requirements
14
- Overview
  14
- DCXO Setup and Operation
  14
- Reference Clock Setup and Operation
  15
- Phase Noise Specification
  15
RF and BBPLL Synthesizer
16
- Overview
  16
- RFPLL Introduction
  16
- AD9361 PLL Architecture
  16
- Reference Block
  16
- Main PLL Block
  17
- Charge Pump Current
  18
- RFPLL Loop Filter
  18
- VCO Configuration
  18
- VCO Calibration
  18
- VCO Vtune Measurement
  18
- Lock Detector
  18
- Synthesizer Look up Table
  19
- TDD Mode Faster Lock Times
  19
- External lo
  19
- Baseband PLL (BBPLL)
  19
- Bbpll Vco
  20
- BBPLL Charge Pump
  21
- BBPLL Loop Filter
  21
Fast Lock Profiles
22
- Overview
  22
- Fast Lock Initial Wider BW Option
  22
- Configuring and Using a Fast Lock Profile
  23
- Fast Lock Pin Select
  24
Enable State Machine Guide
25
- Overview
  25
- ENSM State Definitions
  25
- Modes of Operation
  26
- Sleep State
  30
Filter Guide
31
- Overview
  31
- Tx Signal Path
  31
- Tx Digital Filter Blocks
  31
- Tx Analog Filter Blocks
  32
- Rx Signal Path
  33
- Rx Analog Filter Blocks
  33
- Rx Digital Filter Blocks
  33
- Digital Rx Block Delay
  34
Gain Control
35
- Overview
  35
- Gain Control Threshold Detectors
  36
- LMT Overload Detector
  36
- ADC Overload Detector
  36
- Low Power Threshold
  36
- Average Signal Power
  36
- Settling Times
  37
- Peak Overload Wait Time
  37
- Settling Delay
  37
- Gain Table Overview
  37
- Full Table Mode
  37
- Split Table Mode
  38
- Digital Gain
  38
- MGC Overview
  38
- Slow Attack AGC Mode
  40
- Slow Attack AGC Gain Update Time
  40
- Overloads in Slow Attack AGC Mode
  41
- Slow Attack AGC and Gain Tables
  41
- Hybrid AGC Mode
  42
- Fast Attack AGC Mode
  42
- State 0: RESET
  43
- State 1: Peak Overload Detect
  43
- State 2: Measure Power and Lock Level Gain Change
  44
- State 3: Measure Power and Peak Overload Detect
  44
- State 4: Unlock Gain
  44
- State 5: Gain Lock and Measure Power
  45
Custom Gain Tables
47
- Overview
  47
- RF DC Cal Bit
  49
- Maximum Full Table/Lmt Table Index
  49
- External LNA
  49
Received Signal Strength Indicator (RSSI)
50
- Overview
  50
- Mode Select and Measurement Duration
  50
- RSSI Weighting
  50
- RSSI Delay and RSSI Wait
  50
- RSSI Preamble and RSSI Symbol
  51
- Rssi Rfir
  51
- RSSI Gain Step Calibration
  51
Transmit Power Control
55
- Overview
  55
- Tx Attenuation Words
  55
- Attenuation Word Update Options
  55
Tx Power Monitor
56
RF Port Interface
61
- Overview
  61
- Rx Signal Path Interface
  62
- Tx Signal Path Interface
  69
Factory Calibrations
71
- Overview
  71
- Internal DCXO
  71
- Tx RSSI (Tx Monitor)
  71
- Rx RSSI
  71
- Rx GM/LNA Gain Step Calibration
  72
- Carrier Frequency
  72
Control Output
73
Auxadc/Auxdac/Gpo/Temp Sensor
82
- Overview
  82
- Auxdac
  82
- Auxadc
  83
- Internal Temperature Sensor
  84
- General Purpose Output Control
  85
Baseband Synchronization
87
- Overview
  87
- Multichip Synchronization
  87
- Procedure
  88
- Synchronization Verification
  89
Digital Interface Specification
90
Power Supply and Layout Guide
117
Related Links
128

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