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IC BLOCK DIAGRAM & DESCRIPTION
IC500 M37920FCCGP(MICOM)
P8
/CTS
3
P8
/CTS
2
P7
/AN
/AD
3
3
P7
P12
2
P12
1
P12
0
AV
P10
P11
P12
80
79
78
77
76
75
74
73
P10
/A
0
0
81
P8
/CLK
6
0
82
P8
/R
D
5
X
0
83
P8
/T
D
84
4
X
0
/RTS
0
0
85
/CLK1
86
1
P8
/RxD
1
1
87
P8
/TxD
88
0
1
V
89
CC
AV
CC
90
V
91
REF
AV
SS
92
V
SS
93
/INT
TRC
4
94
/AN
/INT
95
2
2
3
P7
/AN
96
1
1
P7
/AN
97
0
0
/INT
/TB2
98
2
IN
/INT
/TB1
1
IN
99
/INT
/TB0
0
IN
100
1
2
3
4
5
6
7
8
NAME
DESCRIPTION
I/O
V
,V
Power source
I
Vcc:applied 5V 0.5V Vss:applied0V
CC
SS
MD0
MD0
I
Prosessor mode switch. Connect to Vss when songle chip modeand memory extension mode.
MD1
MD1
I
Connect to Vss.
RESET
Reset input
I
Reset:low level applied.
X
Clock input
I
IN
Clock oscillation circuit in/output. connect ceramic or crystal resonator between Xin and Xout.
Use external clock input connect Xin and Xout open.
X
Clock output
O
OUT
BYTE
External data bus
I
Memory extension mode or micro prosessor mode: Select which external data bus width 8bits
width switch input
and 16bits. When 16 bits at low and 8bits at high.
,AV
Analogue power
I
Power sourse for A-D converter. External connect AVcc to Vcc and AVss to Vss.
CC
SS
source
V
Voltage reference
I
Voltage reference for A-D converter.
REF
P0
P0
Input/output port
Single chip mode:port P0 is in/output for 8 bits.
0
7
I/O
P0
Memory extension or micro-processor mode:address(A16 A23)output. When DRAM space
access:multiplex address(MA8 MA11)output.
P1
P1
Input/output port
I/O
Single chip mode:same function of port P0.
0
7
P1
Memory extension or micro-processor mode:in/output under data 8 bits (D0 D7)
P2
P2
Input/output port
Single chip mode,memory extension ormicro prosessor mode(BYTE is high & use external data
0
7
I/O
P2
bus width is 8 bits width):same function of port P0.
Memory extension or micro-processor mode(BYTE is low & use external data width is 16 bits
width):in/output high data 8 bits(A8 D15).
P3
P3
Input/output port
Single chip mode:same fanction of P0.
0
3
I/O
P3
memory extension mode:P3
Each P3
P4
P4
Input/output port
Single chip mode:same fanction of P0.
0
4
I/O
P4
memory extension mode:P4
register set.
Micro prosessor made:P4
P4
2
P5
0
P5
7
Input/output port
I/O
Single chip mode:same fanction P0,timer A1,A2 in/output and real-time output.
P5
P6
0
P6
6
Input/output port
I/O
Single chip mode:same fanction P0 and timer A1,A3,A4 in/output.
P6
DMA requirement input and DMA answer signal.
P7
0
P7
3
Input/output port
I/O
Single chip mode:same fanction and A-D converter input.
P7
P7
2
P8
P8
Input/output port
Single chip mode:same fanction P0 and UART
0
6
I/O
P8
P9
P9
Input/output port
Single chip mode:same fanction P0,chip select CS
0
6
I/O
P9
output.
P10
Input/output port
Single chip mode:same fanction P0.
0
7
I/O
P10
Memory extension or micro prosessor mode:address(A
P11
Input/output port
Single chip mode:same fanction P0.
0
7
I/O
P11
Memory extension or micro prosessor mode:address(A
(MA
P12
Input/output port
Single chip mode:same fanction P0 and timer B
0
2
I/O
P12
NMI
Non maskable
I
Non maskable interrupt.
interrupt
72
71
70
69
68
67
66
65
64
63
62
61
60
9
10
11
12
13
14
15
16
17
18
19
20
21
FUNCTION
is in/output port andRDY outout at regster set.
0
,P3
and P3
are RD,BLW and BHW output.
1
2
3
P4
are in/output and ALE,
0
4
,P4
are output ofALE,
0
1
is in/output and TC output at resister set. P4
,P7
are INT
,INT
input.
3
3
4
,UART
0
0
MA
7
)output when DRAM space access.
0
- 59 -
59
58
57
56
55
54
53
52
51
50
P1
/D
5
5
49
P1
/D
6
6
48
P1
/D
7
7
47
P2
/D
0
6
46
P2
/D
1
9
45
P2
/D
2
10
44
P2
/D
3
11
43
P2
/D
4
12
42
P2
/D
5
13
41
P2
/D
6
14
40
P2
/D
7
15
39
V
CC
38
X
OUT
X
37
IN
36
V
SS
35
MD0
34
RESET
33
NMI
32
BYTE
31
P3
/RDY
0
22
23
24
25
26
27
28
29
30
,TC,HOLD,HLDA in/output at
1
, and in/output at resister set.
1
3
is HOLD output. P4
4
is HLDA output.
input.
1
CS
output and DRAM control signal
1
3
0
A
7
)output.
8
A
15
)output and multiplex address
,B
,B
input.
1
2
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