Uart - Intel Atom E660 User Manual

Getting Started
2.5.11

UART

The carrier board provides five UART ports for use in the system.
Four UART ports are provided from the Intel
provided from the SIO (SMSC LPC47M172*). The features of these ports are as follows:
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• Intel
— UART port 0:
— Assigned rear I/O panel's D-Sub 9pin stacked connector (X19) via a RS-
— Standard 16550 Compatible UART with Send/Receive 256-Byte FIFOs
— The receive FIFO generates 3-bit error data per byte
— Supports 300k and 4Mbps Baud Rate but X19 port supports up to 1Mbps
— Programmable Baud Rate Generator
— Enables auto hardware flow control of the Intel
— UART port 1-3:
— Assigned rear I/O panel's D-Sub 9pin stacked connectors (X17; UART2,
— Standard 16550 Compatible UART with Send/Receive 64-Byte FIFOs
— The receive FIFO generates 3-bit error data per byte
— Supports 300k and 1Mbps Baud Rate
— Programmable Baud Rate Generator
— SIO (SMSC LPC47M172*)'s UART feature:
— Assigned rear I/O panel's D-Sub 9pin stacked connector (X16) via a RS-
— High Speed 16C550A Compatible UART with Send/Receive 16-Byte FIFOs
— Supports 230k and 460k Baud Rate
— Programmable Baud Rate Generator
Figure 6
January 2012
Document Number: 324213-002
PCH EG20T UART feature:
232C transceiver MAXIM MAX3245ECAI+* or via two RS485 transceivers
MAXIM MAX3076EESD*. The alternate selection is done by switches (SW1-
SW3) and jumpers (J16-J21) on the board. UART0 is connected to a 2x5
2.54mm pin header (X46) directly.
following RS-232C transceiver's specification.
X18; UART1) via a RS-232C transceiver MAXIM MAX3245ECAI+*. UART3 is
connected to a 2x5 2.54mm pin header (X40) directly.
232C transceiver MAXIM MAX3245ECAI+*.
and Figure 7 describe the carrier board UART interface connection.
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Intel Atom™ Processor E660 with Intel
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PCH EG20T and one UART interface is
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PCH EG20T
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Platform Controller Hub EG20T Development Kit
User Manual
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