Interrupt Vector - Fujitsu MB91401 Datasheet

32-bit proprietary microcontroller lsi network security system
Table of Contents

Advertisement

MB91401

INTERRUPT VECTOR

Interrupt source
Reset
Mode vector
System reserved
System reserved
System reserved
System reserved
System reserved
Coprocessor absent trap
Coprocessor error trap
INTE instruction
Instruction break exception
Operand break trap
Step trace trap
NMI request (tool)
Undefined instruction exception
NMI request
Ethernet MAC IF
Authentication macro
IPSec Accelerator/Code macro
EX IF/GPIO
USB/I
2
C/CARD IF
External interrupt 5
External interrupt 6
External interrupt 7
Reload timer 0
Reload timer 1
Reload timer 2
UART0 (Reception completed)
UART1 (Reception completed)
UART0 (RX completed)
UART1 (RX completed)
DMAC0 (end error) Ethernet MAC IF
DMAC1 (end error) External IF
DMAC2 (end error) USB
44
Interrupt number
Interrupt
Hexa-
level
Decimal
decimal
0
00
1
01
2
02
3
03
4
04
5
05
6
06
7
07
8
08
9
09
10
0A
11
0B
12
0C
13
0D
14
0E
15
0F
F
fixed
H
16
10
ICR00
17
11
ICR01
18
12
ICR02
19
13
ICR03
20
14
ICR04
21
15
ICR05
22
16
ICR06
23
17
ICR07
24
18
ICR08
25
19
ICR09
26
1A
ICR10
27
1B
ICR11
28
1C
ICR12
29
1D
ICR13
30
1E
ICR14
31
1F
ICR15
32
20
ICR16
33
21
ICR17
Prelminary
2004.11.12
Address of TBR
Offset
default
3FC
000FFFFC
H
H
3F8
000FFFF8
H
H
3F4
000FFFF4
H
H
3F0
000FFFF0
H
H
3EC
000FFFEC
H
H
3E8
000FFFE8
H
H
3E4
000FFFE4
H
H
3E0
000FFFE0
H
H
3DC
000FFFDC
H
H
3D8
000FFFD8
H
H
3D4
000FFFD4
H
H
3D0
000FFFD0
H
H
3CC
000FFFCC
H
H
3C8
000FFFC8
H
H
3C4
000FFFC4
H
H
3C0
000FFFC0
H
H
3BC
000FFFBC
H
H
3B8
000FFFB8
H
H
3B4
000FFFB4
H
H
3B0
000FFFB0
H
H
3AC
000FFFAC
H
H
3A8
000FFFA8
H
H
3A4
000FFFA4
H
H
3A0
000FFFA0
H
H
39C
000FFF9C
H
H
398
000FFF98
H
H
394
000FFF94
H
H
390
000FFF90
H
H
38C
000FFF8C
H
H
388
000FFF88
H
H
384
000FFF84
H
H
380
000FFF80
H
H
37C
000FFF7C
H
H
378
000FFF78
H
H
(Continued)
RN
4
5
8
9
6
7
0
1
2
3

Advertisement

Table of Contents
loading

Table of Contents