1: Introduction
The ARM instruction set summary is shown in Table 1-2.
Operation
Move
Move
Move NOT
Move SPSR to register
Move CPSR to register
Move register to SPSR
Move register to CPSR
Move immediate to SPSR flags
Move immediate to CPSR flags
Arithmetic
Add
Add with carry
Subtract
Subtract with carry
Subtract reverse subtract
Subtract reverse subtract with carry
Multiply
Multiply accumulate
Multiply unsigned long
Multiply unsigned accumulate long
Multiply signed long
Multiply signed accumulate long
Compare
Compare negative
Logical
Test
Test equivalence
AND
EOR
ORR
Bit clear
Branch
Branch
Branch with link
Branch, and exchange instruction
set
1-8
Table 1-2 ARM instruction summary
EPSON
Assembler
MOV{cond}{S} <Rd>, <Oprnd2>
MVN{cond}{S} <Rd>, <Oprnd2>
MRS{cond} <Rd>, SPSR
MRS{cond} <Rd>, CPSR
MSR{cond} SPSR{field}, <Rm>
MSR{cond} CPSR{field}, <Rm>
MSR{cond} SPSR_f, #<32bit_Imm>
MSR{cond} CPSR_f, #<32bit_Imm>
ADD{cond}{S} <Rd>, <Rn>, <Oprnd2>
ADC{cond}{S} <Rd>, <Rn>, <Oprnd2>
SUB{cond}{S} <Rd>, <Rn>, <Oprnd2>
SBC{cond}{S} <Rd>, <Rn>, <Oprnd2>
RSB{cond}{S} <Rd>, <Rn>, <Oprnd2>
RSC{cond}{S} <Rd>, <Rn>, <Oprnd2>
MUL{cond}{S} <Rd>, <Rm>, <Rs>
MLA{cond}{S} <Rd>, <Rm>, <Rs>, <Rn>
UMULL{cond}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
UMLAL{cond}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
SMULL{cond}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
SMLAL{cond}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
CMP{cond} <Rd>, <Oprnd2>
CMN{cond} <Rd>, <Oprnd2>
TST{cond} <Rn>, <Oprnd2>
TEQ{cond} <Rn>, <Oprnd2>
AND{cond}{S} <Rd>, <Rn>, <Oprnd2>
EOR{cond}{S} <Rd>, <Rn>, <Oprnd2>
ORR{cond}{S} <Rd>, <Rn>, <Oprnd2>
BIC{cond}{S} <Rd>, <Rn>, <Oprnd2>
B{cond} <label>
BL{cond} <label>
BX{cond} <Rn>
ARM720T CORE CPU MANUAL