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TABLE 3-5.
TRACK SERVO CIRCUIT FUNCTIONS
Circuit Element
Function
Track Servo Head
Track 'Servo
Preamplifier
Positive and
Negative Gates
Positive and
Negative Delays
Even Dibits and Odd
Dibits Flips-Flops
Dibits Peak
Detectors
AGe Circuit
Track Servo
Amplifier
Cylinder Pulse
Detection
Velocity
Integrator
83318200
A
Reads dibit information from the disk servo tracks.
This head
cannot write.
Amplifies the signal read by the track servo head.
Separate dibit waveforms into positive and negative components.
Positive gate triggers during first half-cycle of positive
dibits (read from odd dibit track) and second half-cycle of
negative dibits (read from even dibit track).
Negative gate
triggers in the reverse condition.
Function as synchronizing gates to control dibit pulses gener-
ation.
Positive delay fires at leading edge of positive gate.
If negative gate output is available before positive delay
times out, it indicates that positive dibit has been sensed.
This triggers the Odd Dibit FF.
The positive gate also serves
as an inhibit to the positive peak detector during the negative
portion of the positive dibit and the entire negative dibit.
The negative delay functions in the reverse condition.
Provides 600-nsec pulses indicating dibits.
Frequency of each
one-shot is 403 kHz.
Provide peak detection of dibit signals.
Outputs are propor-
tional to dibits amplifiers: the greater the amplitude, the
more negative the output.
When head is centered between dibit
tracks, outputs of + and - peak detector are equal.
As head
moves from center position, output from one peak detector in-
creases negatively while output from the other peak detector
becomes less negative.
The difference between these two out-
puts is proportional to servo head displacement from centered
(on cylinder) position.
AGe voltage is proportiol to sum of dibit signals.
As
signal
strength increases, voltage goes less negative to reduce cir-
cuit gain.
Provides signal proportional to sum of + and - dibit peak de-
tectors.
Output is null when head is centered between dibit
tracks (on cylinder); negative when over odd track or outer
guard band: positive when over even track or inner guard band.
Provides cylinder pulses to difference counter and other logic
elements as track servo signal approaches null. One pulse is
generated per track crossed (even/odd transition or odd/even
transition).
Provides ramp signal proportional to distance travelled (ve-
locity integrated with time).
Output is positive-going during
forward seek; negative-going during reverse seek.
Output is
pulled back to zero to re-initiate integrator function by each
cylinder pulse, or during certain conditions of
RTZ
or Load
sequences.
3-67
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