HP 3000 III Series Manual page 83

System/CPU Overview
2-78. CMUX AND CMUX CONTROL. The CMUX is controlled by the Next
Control and CMUX Control to determine whether the instruction
from the NIR or CIR goes into the Mapper.
2-79. MAPPER AND MAPPER CONTROL. The Mapper combines the inputs
"fran the Cf.lUX and Mapper Control and generates an 8-bit output
that addresses a specific location in the LUT ROM.
2-80. LUT ROM. The LUT ROM outputs a l2-bit address and eight
special use bits as determined by the Mapper. The l2-bit address
is applied to the VBUS MUX and the VBUS MUX generates a l6-bit
output that addresses the initial microcode instruction that
starts the accomplishment of the instruction from the NIR or CIR.
The eight special use bits specify the mode of addressing being
utilized for the memory reference instructions. The SPO, SPl,
and SP2 bits are applied to the SR Preadjust Adder tq define how
many TOS registers must be valid before execution of the in-
struction can begin. Data bit 0 in the LUT ROM is the W-bit and
bits 1 through 12 contain the starting address of the micropro-
gram for the instruction to be executed. When a new instruction
is to be executed, the W-bit is stored in the W-Bit Register.
The W-bit has different meanings for different instructions and
has a fixed, known value for every instruction as follows:
a. For STACKOPS (CIR (0:3)
=
%00) instructions, the W-bit has no
meaning; it is set to logic 1 merely for convenience.
b. For SUBOP 1 (eIR (0:3)
=
%01) instructions:
(1) The W-bit is set to logic 1 for instructions regarding
P-relative addresses (some branches). In this case, eIR
(10) is treated as a sign bit for the P-relative dis-
placement in CIR (11:15). This bit controls the function
of the Pre-Adder (add or subtract) so that a positive or
negative number can be obtained from it.
(2) The W-bit is set equal to logic 0 for shift instructions.
In this case, the pre-added output is CIR (10: 15), a
6-bit shift count, with zeros in all other bit positions.
c. For SUBOP 2 (CIR (0:3)
=
%02) instructions, the W-bit con-
trols the function of the Pre-Adder. In all cases, the input
to the Pre-Adder is CIR (8:15). When the W-bit is logic 0,
the Pre-Adder is set to add. Since the second input to the
Pre-Adder is logic 0 (no indexing), the output is -CIR (8:15)
(=
317 - CIR (8:15)), a negative number.
d. For SUBOP 3 (CIR (0:3)
=
%03) instructions:
(1) For SPECOP 00 (CrR (0:3)
=
%03), the W-bit is set to
logic 0 which forces the Pre-Adder to the add function.
In addition, only eIR (12:15) is applied to the Pre-Adder
input. Therefore, the output is the K-field CIR (12:15).
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