Silicon Laboratories EFR32 G1 Series Reference Manual page 465

17.3.9.3 Slave Transmitter
When SLAVE in I2Cn_CTRL is set, the RSTART interrupt flag in I2Cn_IF will be set when repeated START conditions are detected.
After a START or repeated START condition, the bus master will transmit an address along with an R/W bit. If there is no room in the
receive shift register for the address, the bus will be held by the slave until room is available in the shift register. Transmission then
continues and the address is loaded into the shift register. If this address does not pass address recognition, it is automatically
NACK'ed by the slave, and the slave goes to an idle state. The address byte is in this case discarded, making the shift register ready
for a new address. It is not loaded into the receive buffer.
If the address was accepted and the R/W bit was set (R), indicating that the master wishes to read from the slave, the slave now goes
into the slave transmitter mode. Software interaction is now required to decide whether the slave wants to acknowledge the request or
not. The accepted address byte is loaded into the receive buffer like a regular data byte. If no valid interaction is pending, the bus is
held until the slave responds with a command. The slave can reject the request with a single NACK command.
The slave will in that case go to an idle state, and wait for the next start condition. To continue the transmission, the slave must make
sure data is loaded into the transmit buffer and send an ACK. The loaded data will then be transmitted to the master, and an ACK or
NACK will be received from the master.
Data transmission can also continue after a NACK if a CONT command is issued along with the NACK. This is not standard I
er.
If the master responds with an ACK, it may expect another byte of data, and data should be made available in the transmit buffer. If
data is not available, the bus is held until data is available.
If the response is a NACK however, this is an indication of that the master has received enough bytes and wishes to end the transmis-
sion. The slave now automatically goes idle, unless CONT in I2Cn_CMD is set and data is available for transmission. The latter is not
2
standard I C.
The master ends the transmission by sending a STOP or a repeated START. The SSTOP interrupt flag in I2Cn_IF is set when the
master transmits a STOP condition. If the transmission is ended with a repeated START, then the SSTOP interrupt flag is not set.
Note: The SSTOP interrupt flag in I2Cn_IF will be set regardless of whether the slave is participating in the transmission or not, as long
as SLAVE in I2Cn_CTRL is set and a STOP condition is detected.
If arbitration is lost at any time during transmission, the ARBLOST interrupt flag in I2Cn_IF is set, the bus is released and the slave
goes idle.
See Table 17.7 I2C Slave Transmitter on page 465
I2Cn_STATE Description
0x41 Repeated START re-
ceived
0x75 ADDR + R received
- Data transmitted
0xD5 Data transmitted, ACK
received
0xDD Data transmitted, NACK
received
silabs.com | Building a more connected world.
for more information.
Table 17.7. I2C Slave Transmitter
I2Cn_IF Required in-
teraction
RSTART interrupt flag RXDATA
(BUSHOLD interrupt
flag)
ADDR interrupt flag ACK + TXDA-
TA
RXDATA interrupt flag NACK
(BUSHOLD interrupt NACK +
flag) CONT +
TXDATA
TXBL interrupt flag None
(TXC interrupt flag)
ACK interrupt flag TXDATA
(BUSHOLD interrupt
flag)
NACK interrupt flag None
(BUSHOLD interrupt CONT +
flag) TXDATA
I2C - Inter-Integrated Circuit Interface
Response
Receive and compare address
ACK will be sent, then DATA
NACK will be sent, slave goes idle
NACK will be sent, then DATA.
DATA will be transmitted
The slave goes idle
DATA will be transmitted
Reference Manual
2
C howev-
Rev. 1.3 | 465