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AN4467
Application note
Getting started with STM32L0xx hardware development
Introduction
This application note is intended for system designers who require a hardware
implementation overview of the development board features such as the power supply, the
clock management, the reset control, the boot mode settings and the debug management. It
shows how to use STM32L0xx product families and describes the minimum hardware
resources required to develop an STM32L0xx application.
Detailed reference design schematics are also contained in this document with descriptions
of the main components, interfaces and modes.
Table 1. Applicable products
Type
Product categories
Microcontrollers
STM32L0 Series
April 2014
DocID026156 Rev 1
1/34
www.st.com
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Summary of Contents for ST STM32L0 Series
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Page 1: Table 1. Applicable Products
STM32L0xx application. Detailed reference design schematics are also contained in this document with descriptions of the main components, interfaces and modes. Table 1. Applicable products Type Product categories Microcontrollers STM32L0 Series April 2014 DocID026156 Rev 1 1/34 www.st.com... -
Page 2: Table Of Contents
Contents AN4467 Contents Power supplies ..........6 Introduction . - Page 3 AN4467 Contents Pinout and debug port pins ........25 Serial wire debug (SWD) pin assignment .
- Page 4 List of tables AN4467 List of tables Table 1. Applicable products ............1 Table 2.
- Page 5 AN4467 List of figures List of figures Figure 1. Power supply overview ........... . . 7 Figure 2.
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Page 6: Power Supplies
Power supplies AN4467 Power supplies Introduction The chip requires power supply on different power pins: • VDD= 1.65 to 3.6 V: external power supply for I/Os and the internal regulator. Provided externally through VDD pins. For VDD below 1.8 V see Section 1.3.3: Brownout reset (BOR) •... -
Page 7: Figure 1. Power Supply Overview
AN4467 Power supplies Figure 1. Power supply overview Note: and V must be connected to V and V , respectively. DocID026156 Rev 1 7/34... -
Page 8: Independent A/D Converter Supply And Reference Voltage
Power supplies AN4467 1.1.1 Independent A/D converter supply and reference voltage To improve conversion accuracy, the ADC and the DAC have an independent power supply that can be filtered separately, and shielded from noise on the PCB. • The ADC voltage supply input is available on a separate V •... -
Page 9: Independent Lcd Supply (Stm32L0X3 Only)
AN4467 Power supplies 1.1.2 Independent LCD supply (STM32L0x3 only) The V pin is provided to control the contrast of the glass LCD. This pin can be used in two ways: • It can receive, from an external circuitry, the desired maximum voltage that is provided on the segment and common lines to the glass LCD by the microcontroller. - Page 10 Power supplies AN4467 Voltage regulator works in three different modes depending on the application: • In Run mode, the regulator supplies full power to the V domain (core, memories core and digital peripherals). • In Stop mode, low-power run and low-power wait modes, the regulator supplies low- power to the V domain, preserving the contents of the registers and SRAM.
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Page 11: Power Supply Schemes
AN4467 Power supplies Power supply schemes The circuit is powered by a stabilized power supply, V • The V pins must be connected to V with external decoupling capacitors; one single Tantalum or Ceramic capacitor (minimum 4.7 µF typical 10 µF) for the package + one 100 nF Ceramic capacitor for each V pin). -
Page 12: Reset And Power Supply Supervisor
Power supplies AN4467 Figure 3. Optional LCD power supply scheme • Option 1: LCD power supply is provided by a dedicated VLCD supply source, VSEL switch is open. • Option 2: LCD power supply is provided by the internal step-up converter, VSEL switch is closed, an external capacitance is needed for correct behavior of this converter. -
Page 13: Figure 4. Power Supply Supervisors
AN4467 Power supplies Figure 4. Power supply supervisors D DA 100 mV hysteresis 100 mV hysteresis IT enabled PVD output BOR reset (NRST) BOR/PDR reset (NRST) POR/PDR reset (NRST) (Note 1) BOR always active (Note 2) BOR disabled by option byte (Note 3) POR/PDR (BOR not available) (Note 4) -
Page 14: Power-On Reset (Por) / Power-Down Reset (Pdr), Brownout Reset (Bor)
Power supplies AN4467 1.3.1 Power-on reset (POR) / Power-down reset (PDR), Brownout reset (BOR) The monitoring voltage begins at 0.7 V. During power-on, for devices operating between 1.8 and 3.6 V, the BOR keeps the device under reset until the supply voltages (V and V ) come close to the lowest acceptable voltage (1.8 V). -
Page 15: Brownout Reset (Bor)
AN4467 Power supplies Figure 6. PVD thresholds 100 mV PVD threshold hysteresis PVD output 1.3.3 Brownout reset (BOR) During power on, the brownout reset (BOR) keeps the device under reset until the supply voltage reaches the specified V threshold. For devices operating from 1.65 to 3.6 V, the BOR option is not available and the power supply is monitored by the POR/PDR. -
Page 16: System Reset
Power supplies AN4467 1.3.4 System reset A system reset sets all registers to their reset values except for the RTC, backup registers and RCC control/status register, RCC_CSR. A system reset is generated when one of the following events occurs: A low level on the NRST pin (external reset) Window watchdog end-of-count condition (WWDG reset) Independent watchdog end-of-count condition (IWDG reset) A reset bit set by software (SWreset) -
Page 17: Clocks
AN4467 Clocks Clocks Four different clock sources can be used to drive the system clock (SYSCLK): • HSI16 (high-speed internal) oscillator clock • HSE (high-speed external) oscillator clock • PLL clock • MSI (multispeed internal) oscillator clock The MSI is used as a system clock source after startup from reset, wake-up from Standby low-power modes.The MSI, HSI16 or HSI16 divided by four, are used as a system clock source after wake-up from Stop low-power mode. -
Page 18: Hse Osc Clock
1. The value of R depends on the crystal characteristics. A typical value is in the range of 5 to 6 R (resonator series resistance).To fine tune the REXT value ,refer to AN2867(Oscillator design guide for ST microcontrollers) 2. Load capacitance, C... - Page 19 AN4467 Clocks and C . The PCB and MCU pin capacitances must be included when sizing C (10 pF can be used as a rough estimate of the combined pin and board capacitance). Refer to the electrical characteristics sections in the datasheet of your product for more details and to the application note AN2867 “Oscillator design guide for STM microcontrollers”.
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Page 20: Lse Osc Clock
Clocks AN4467 LSE OSC clock The LSE crystal is a 32.768 kHz Low Speed External crystal or ceramic resonator. It has the advantage of providing a low-power but highly accurate clock source to the real-time clock peripheral (RTC) for clock/calendar or other timing functions. 2.3.1 External crystal/ceramic resonator (LSE crystal) The LSE crystal is switched on and off using the LSEON bit in RCC control/status register... -
Page 21: Clock Security System On Hse (Csshse)
Calibration RC oscillator frequencies can vary from one chip to another due to manufacturing process variations, This is why each device is factory calibrated by ST for 1% accuracy at T = 25 °C. If the application is subject to voltage or temperature variations, the RC oscillator speed will be impacted. -
Page 22: Boot Configuration
0000), but is still accessible from its original memory space (0x2000 0000). Embedded boot loader The embedded boot loader is located in the System memory, programmed by ST during production. It is used to reprogram the Non Volatile memory using one of the following interfaces: •... -
Page 23: Boot0 Pin Connection
AN4467 Boot configuration BOOT0 pin connection The BOOT0 pin of the STM32L0 has a lower VIL than the other GPIO, (for details see datasheet I/O static characteristics), thus as it does not fit CMOS requirement, when driven by another CMOS circuit the signal level must be verified. DocID026156 Rev 1 23/34... -
Page 24: Debug Management
Figure 12 shows the connection of the host to a development board. The Nucleo demonstration board embeds the debug tools (ST-LINK) so it can be directly connected to the PC through an USB cable. Figure 12. Host-to-board connection SWD debug port (serial wire) The STM32L0xx core integrates the serial wire debug port (SW-DP). -
Page 25: Pinout And Debug Port Pins
AN4467 Debug management Pinout and debug port pins The STM32L0xx MCU is offered in various packages with varying numbers of pins. Serial wire debug (SWD) pin assignment The same SWD pin assignment is available on all STM32L0xx packages. Table 4. SWD port pins SWD port SWD pin name Pin assignment... -
Page 26: Figure 13. Swd Port Connection
Debug management AN4467 Figure 13. SWD port connection 26/34 DocID026156 Rev 1... -
Page 27: Recommendations
AN4467 Recommendations Recommendations Printed circuit board For technical reasons, it is best to use a multilayer printed circuit board (PCB) with a separate layer dedicated to ground (V ) and another dedicated to the V supply. This provides good decoupling and a good shielding effect. For many applications, economical reasons prohibit the use of this type of board. -
Page 28: Other Signals
Recommendations AN4467 Figure 14. Typical layout for V pair Other signals When designing an application, the EMC performance can be improved by closely studying the following: • Signals for which a temporary disturbance affects the running process permanently (which is the case for interrupts and handshaking strobe signals but, not the case for LED commands). -
Page 29: Clock
AN4467 Reference design Reference design Description The reference design shown in Figure 15, is based on the STM32L053RBT6 This reference design can be tailored to any STM32L0 device with a different package, using the pin correspondence given in Table 7: Reference connection for all packages. -
Page 30: Table 5. Mandatory Components
Reference design AN4467 Component references Table 5. Mandatory components Reference Component name Value Quantity Comments Microcontroller STM32L053R8(T6) 64-pin package C8, C9, C10, C13 Capacitor 100 nF 3 ... 5 Ceramic capacitors (decoupling capacitors) Tantalum / chemical / ceramic capacitor Capacitor 4.7 µF (decoupling capacitor) Ceramic capacitor (LCD booster or... -
Page 31: Figure 15. Reference Design (Based On Stm32L053Rbt6)
AN4467 Reference design Figure 15. Reference design (based on STM32L053RBT6) DocID026156 Rev 1 31/34... -
Page 32: Table 7. Reference Connection For All Packages
Reference design AN4467 Table 7. Reference connection for all packages Pin numbers per package Pin name LQFP 64 pins LQFP 48 pins LQFP 32 pins BGA 64 pins CSP 36 pins QFN 32 pins PC14-OSC32_IN PC15-OSC32_OUT PH0-OSC_IN PH1-OSC_OUT NRST REF+ SS_4 DD_4 SS_1... -
Page 33: Table 8. Document Revision History
AN4467 Revision history Revision history Table 8. Document revision history Date Revision Changes 24-Apr-2014 Initial release DocID026156 Rev 1 33/34... - Page 34 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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