Analog Devices Linear LTM 4700 User Manual
Analog Devices Linear LTM 4700 User Manual

Analog Devices Linear LTM 4700 User Manual

Dual 50a or single 100a µmodule regulator with digital power system management
Table of Contents

Advertisement

Quick Links

FEATURES

Dual 50A or Single 100A Digitally Adjustable Outputs with
n
Digital Interface for Control, Compensation and Monitoring
Wide Input Voltage: 4.5V to 16V
n
Output Voltage Range: 0.5V to 1.8V
n
~90% Full Load Efficiency from 12V
n
±0.5% Maximum DC Output Error Over Temperature
n
±3% Current Readback Accuracy (25°C to 125°C)
n
Integrated Input Current Sense Amplifier
n
400kHz PMBus-Compliant I
n
Supports Telemetry Polling Rates Up to 125Hz
n
Integrated 16-Bit ∆Σ ADC
n
Constant Frequency Current Mode Control
n
Parallel and Current Share Multiple Modules
n
15mm × 22mm × 7.87mm BGA Package
n
Readable Data:
Input and Output Voltages, Currents, and Temperatures
n
Running Peak Values, Uptime, Faults and Warnings
n
Internal EEPROM and Fault Logging with ECC
n
Writable Data and Configurable Parameters:
Output Voltage, Voltage Sequencing and Margining
n
Digital Soft-Start/Stop Ramp
n
Optimize Analog Loop Compensation
n
OV/UV/OT, UVLO, Frequency and Phasing
n

APPLICATIONS

System Optimization, Characterization and Data Min-
n
ing in Prototype, Production and Field Environments
Telecom, Datacom, and Storage Systems
n

TYPICAL APPLICATION

Dual 50A µModule Regulator with Digital Interface
for Control and Monitoring*
V
IN
5.75V TO 16V
22µF
×8
ON/OFF CONTROL
FAULT INTERRUPTS,
POWER SEQUENCING
PWM CLOCK AND
TIME-BASE
SYNCHRONIZATION
REGISTER WRITE
PROTECTION
*FOR COMPLETE CIRCUIT, SEE FIGURE 46
Document Feedback
Dual 50A or Single 100A µModule Regulator
with Digital Power System Management
to 1V
at 100A
IN
OUT
2
C Serial Interface
V
V
IN0
OUT0
V
+
IN1
V
OSNS0
SV
IN
LOAD
0
RUN
V
0
OSNS0
RUN
1
LTM4700
V
OUT1
FAULT0
+
V
OSNS1
FAULT1
LOAD
V
1
OSNS1
SGND
SYNC
SHARE_CLK
2
SCL
I
C/SMBus I/F WITH
SDA
PMBus COMMAND SET
WP
ALERT
GND
TO/FROM IPMI OR OTHER BOARD
MANAGEMENT CONTROLLER
4700 TA01a
For more information

DESCRIPTION

The
LTM
4700
®
µModule
(power module) DC/DC regulator featuring
®
remote configurability and telemetry-monitoring of power
management parameters over
2
I
C-based digital interface protocol. The LTM4700 is
comprised of fast analog control loops, precision mixed-
signal circuitry, EEPROM, power MOSFETs, inductors and
supporting components. The LTM4700 product video is
available on website.
The LTM4700's 2-wire serial interface allows outputs to
be margined, tuned and ramped up and down at program-
mable slew rates with sequencing delay times. Input and
output currents and voltages, output power, temperatures,
uptime and peak values are readable. Custom configura-
tion of the EEPROM contents is not required. At start-up,
output voltages, switching frequency, and channel phase
angle as-signments can be set by pin-strapping resistors.
The
LTpowerPlay
verter and
demo kits
The LTM4700 is offered in a 15mm × 22mm × 7.87mm
BGA package available with SnPb or RoHS compliant
terminal finish.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258,
7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide.
Click to view associated Video Design Idea.
100
V
,
OUT0
ADJUSTABLE
95
UP TO 50A
220µF
90
×8
85
V
,
OUT1
ADJUSTABLE
UP TO 50A
80
220µF
×8
75
70
www.analog.com
LTM4700
is a dual 50A or single 100A step-down
PMBus— an open standard
GUI and DC1613 USB-to-PMBus con-
®
are available.
Efficiency vs Current at 12V Input
1.5V
1.0V
0
10
20
30
40
LOAD CURRENT (A)
OUT
OUT
50
4700 TA01b
Rev. B
1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Linear LTM 4700 and is the answer not in the manual?

Questions and answers

Summary of Contents for Analog Devices Linear LTM 4700

  • Page 1: Features

    LTM4700 Dual 50A or Single 100A µModule Regulator with Digital Power System Management FEATURES DESCRIPTION Dual 50A or Single 100A Digitally Adjustable Outputs with 4700 is a dual 50A or single 100A step-down ® Digital Interface for Control, Compensation and Monitoring µModule (power module) DC/DC regulator featuring ®...
  • Page 2: Table Of Contents

    LTM4700 TABLE OF CONTENTS Features ............. 1 Serial Interface ............35 Applications ..........1 Communication Protection ........35 Typical Application ........1 Device Addressing ..........35 Description..........1 Responses to V and I Faults ....36 Absolute Maximum Ratings ......4 Output Overvoltage Fault Response ....36 Order Information ..........
  • Page 3 LTM4700 TABLE OF CONTENTS Programmable Loop Compensation ...... 57 Timing ..............92 Checking Transient Response ........58 Timing—On Sequence/Ramp ......92 PolyPhase Configuration ........59 Timing—Off Sequence/Ramp ......93 Connecting The USB to I C/SMBus/ Precondition for Restart ........94 PMBus Controller to the LTM4700 In System ..59 Fault Response ............94 LTpowerPlay: An Interactive GUI for Digital Power .60 Fault Responses All Faults ........94...
  • Page 4: Absolute Maximum Ratings

    LTM4700 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Terminal Voltages: TOP VIEW − (Note 4), SV ...... –0.3V to 18V SW0, SW1 ....−1V to 18V, −5V to 25V Transient ............–0.3V to 3.6V OUTn INTV ..........–0.3V to 6V BIAS .........
  • Page 5: Electrical Characteristics

    LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 6 LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 7 LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 8 LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 9 LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 10 LTM4700 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V = 12V, RUNn = 3.3V, FREQUENCY_SWITCH = 350kHz and V commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM OUTn settings and per Test Circuit 1, unless otherwise noted.
  • Page 11 LTM4700 ELECTRICAL CHARACTERISTICS Note 4: The two power inputs—V and V —and their respective power Note 13: EEPROM endurance and retention are guaranteed by wafer-level outputs—V and V —are tested independently in production. A testing for data retention. The minimum retention specification applies OUT0 OUT1 shorthand notation is used in this document that allows these parameters...
  • Page 12: Typical Performance Characteristics

    LTM4700 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, 12V to 1V , unless otherwise noted. Single Output Efficiency, Single Output Efficiency, = SV = 12V, = SV = INTV = 5V INTV Open CCM Mode CCM Mode 1.8V , 500kHz 1.8V , 500kHz 1.5V , 425kHz 1.5V...
  • Page 13 LTM4700 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, 12V to 1V , unless otherwise noted. Single Channel Load Transient Single Channel Load Transient Single Channel Load Transient Response 25% (12.5A) Load Step, Response 25% (12.5A) Load Step, Response 25% (12.5A) Load Step, 10A/µs 12V to 1V 10A/µs 12V...
  • Page 14 LTM4700 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, 12V to 1V , unless otherwise noted. READ_IOUT of 16 LTM4700 READ_IOUT of 16 LTM4700 READ_IOUT of 16 LTM4700 Channels 12V , 1V Channels 12V , 1V Channels 12V , 1V = –40°C, I = 50A, System = –10°C, I = 50A, System...
  • Page 15: Pin Functions

    LTM4700 PIN FUNCTIONS ASEL (H11): Serial Bus Address Configuration Pin. On PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE any given I C/SMBus serial bus segment, every device LAYOUT CAREFULLY . must have its own unique slave address. If this pin is (G10): Internally Generated 2.5V Power Supply left open, the LTM4700 powers up to a slave address DD25...
  • Page 16 LTM4700s (and GUI intervention or the need to “custom pre-program” any other Analog Devices parts with a SHARE_CLK pin) module NVM contents. (See the Applications Information to realize well-defined rail sequencing and rail tracking.
  • Page 17 LTM4700 PIN FUNCTIONS COMP0b (M13), COMP1b (L9): Current Control Threshold (K9): Internally Generated 3.3V Power Supply Output DD33 and Error Amplifier Compensation Nodes for Channels 0 Pin. This pin should only be used to provide external current for the pull-up resistors required for FAULTn, SHARE_CLK, and 1, Respectively.
  • Page 18 LTM4700 PIN FUNCTIONS (P14), V (M9): Positive Differential Volt- (U12-AB12, U13-AB13, U14-AB14, N15-AB15), OSNS0 OSNS1 OUT0 – age Sense Input. Together, V and V serve to (A12-F12, A13-F13, A14-F14, A15-K15): Power OSNSn OSNSn OUT1 kelvin-sense the output voltage at the point of load (POL) Output Pins of the Switching Mode Regulator.
  • Page 19: Simplified Block Diagram

    LTM4700 SIMPLIFIED BLOCK DIAGRAM SENSE 2.2µF 22µF – INTV RUNP DD33 BIAS 1µF 2.2µF 4.7µF 1µF 0.22µF A = N 5V BIAS CONV. INPUT CURRENT/ICHIP (READIIN, MFRREADIINPEAK TO ANALOG 1µF READBACK) INTV EXTV OUT1 OUT1 TO 1.8V TO 1.8V UP TO 50A 150nH 150nH UP TO 50A...
  • Page 20: Functional Diagram

    LTM4700 FUNCTIONAL DIAGRAM – Figure 3. Functional LTM4700 Block Diagram Rev. B For more information www.analog.com...
  • Page 21: Test Circuits

    LTM4700 TEST CIRCUITS Test Circuit 1. LTM4700 ATE High V Operating Range Configuration, 5.75V ≤ V ≤ 16V 2.2µF 4.7µF 5.75V TO 16V 150µF OUT0 SENSE OUT0 22µF 1V, ADJUSTABLE – ×6 OSNS0 UP TO 50A 100µF LOAD0 ×4 – * BULK OSNS0 OUT0...
  • Page 22: Operation

    LTM4700 OPERATION POWER MODULE INTRODUCTION Programmable Output Voltage The LTM4700 is a highly configurable dual 50A output Programmable Input Voltage On and Off Threshold standalone nonisolated switching mode step-down Voltage DC/DC power supply with built-in EEPROM NVM (non- Programmable Current Limit n volatile memory) with ECC and I C-based PMBus/ SMBus Programmable Switching Frequency...
  • Page 23: Eeprom With Ecc

    LTM4700 OPERATION Three dedicated pins for ALERT, PGOOD0/PGOOD1 func- The degradation in EEPROM retention for temperatures tions are provided. The shutdown operation also allows >125°C can be approximated by calculating the dimen- all faults to be individually masked and can be operated sionless acceleration factor using the following equation: in either unlatched (hiccup) or latched modes.
  • Page 24: Power-Up And Initialization

    See the application Information section or con- conditions along with the programmable compensation tact the factory for details on efficient in-system EEPROM settings. The Analog Devices LTpowerCAD tool is avail- programming, including bulk EEPROM Programming, able for transient and stability analysis, and experienced which the LTM4700 also supports.
  • Page 25: Soft-Start

    LTM4700 OPERATION bottom 4LSBs and the MSBs are set by NVM. See the associated with the start-up voltage ramp. The soft-start Applications Information section for more details. feature is disabled by setting the value of TON_RISE to any value less than 0.25ms. The LTM4700 PWM always After the part has initialized, an additional comparator uses discontinuous mode during the TON_RISE operation.
  • Page 26: Shutdown

    LTM4700 OPERATION multiple LTM4700s. The PGOOD has a 100µs filter. If There are two ways to respond to faults; which are retry the V voltage bounces around the UV threshold for a mode and latched off mode. In retry mode, the controller long period of time it is possible for the PGOOD output responds to a fault by shutting down and entering the inac-...
  • Page 27: Switching Frequency And Phase

    LTM4700 OPERATION this fault is based on an ADC read and can take up to t switch. Additional small propagation delays to the PWM CON- to detect. If there is a concern about the input supply control pins will also apply. Both channels must be off VERT boosting, keep the part in discontinuous conduction mode.
  • Page 28: Output Current Sensing And Sub Milliohm Dcr Current Sensing

    LTM4700 OPERATION A 5V buck converter has been designed in the module INPUT CURRENT SENSING to supply this ~150mA current to improve efficiency and To sense the total input current consumed by the LTM4700’s thermal by saving this LDO loss. This 5V converter will power stages , a sense resistor is placed between the sup- turn on when RUNP pin is higher than 0.85V and will ply voltage and the drain of the top N-channel MOSFET.
  • Page 29: External/Internal Temperature Sense

    LTM4700 OPERATION EXTERNAL/INTERNAL TEMPERATURE SENSE VOUT_OV_FAULT_LIMIT ........+10% VOUT_OV_WARN_LIMIT ........+7.5% Temperature is measured using the internal diode-connect- VOUT_MAX ............+7.5% ed PNP transistors on either of the TSNS0b or TSNS1b VOUT_MARGIN_HIGH ........+5% pins corresponding to channel 0 or 1. TSNSnb pins should VOUT_MARGIN_LOW .........–5% be connected to their respective TSNSna pins, and these VOUT_UV_FAULT_LIMIT ........–7%...
  • Page 30 LTM4700 OPERATION Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the Table 1. VOUTn _CFG Pin Strapping Look-Up Table for the LTM4700’s Output Voltage, Fine Adjustment Setting (Not LTM4700’s Output Voltage, Coarse Setting (Not Applicable if Applicable if MFR_CONFIG_ALL[6] = 1b) MFR_CONFIG_ALL[6] = 1b) (mV) FINE ADJUSTMENT TO V MFR_PWM_...
  • Page 31 LTM4700 OPERATION Table 3. FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4700’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) SWITCHING bits [2:0] of MFR_ bit [4] of MFR_ FSWPH_CFG (kΩ) FREQUENCY (kHz) θSYNC TO θ0 θSYNC TO θ1 PWM_CONFIG CONFIG_ALL...
  • Page 32: Fault Detection And Handling

    LTM4700 OPERATION Table 4. ASEL Pin Strapping Look-Up Table to Set the Table 5. LTM4700 MFR_ADDRESS Command Examples LTM4700’s Slave Address (Applicable Regardless of Expressed in 7- and 8-Bit Addressing MFR_CONFIG_ALL[6] Setting) HEX DEVICE ADDRESS * (kΩ) SLAVE ADDRESS ASEL DESCRIPTION 7-BIT 8-BIT...
  • Page 33: Status Registers And Alert Masking

    LTM4700 OPERATION to poll the fault commands. Alternatively, the FAULTn pins In general, any asserted bit in a STATUS_x register also can be used as inputs to detect external faults downstream pulls the ALERT pin low. Once set, ALERT will remain low of the controller that require an immediate response.
  • Page 34 LTM4700 OPERATION STATUS_WORD STATUS_VOUT* VOUT IOUT VOUT_OV Fault STATUS_INPUT INPUT VOUT_OV Warning MFR_SPECIFIC VOUT_UV Warning VIN_OV Fault POWER_GOOD# VOUT_UV Fault (reads 0) (reads 0) VOUT_MAX Warning VIN_UV Warning (reads 0) TON_MAX Fault (reads 0) (reads 0) TOFF_MAX Warning Unit Off for Insuffcient VIN (reads 0) STATUS_BYTE (reads 0)
  • Page 35: Mapping Faults To Fault Pins

    LTM4700 OPERATION Mapping Faults to FAULT Pins repair can be attempted by writing the desired configura- tion to the controller and executing a STORE_USER_ALL Channel-to-channel fault (including channels from multiple command followed by a CLEAR_FAULTS command. LTM4700s) dependencies can be created by connecting FAULTn pins together.
  • Page 36: Responses To V

    LTM4700 OPERATION Global addressing provides a means of the PMBus master The I and I overcurrent monitors are performed by to address all LTM4700 devices on the bus. The LTM4700 ADC readings and calculations. Thus these values are global address is fixed 0x5A (7-bit) or 0xB4 (8-bit) and based on average currents and can have a time latency cannot be disabled.
  • Page 37: Output Undervoltage Response

    LTM4700 OPERATION Output Undervoltage Response sequence is started. The resolution of the TON_MAX_ FAULT_LIMIT is 10µs. If the VOUT_UV_FAULT _LIMIT The response to an undervoltage comparator output can is not reached within the TON_MAX_FAULT_LIMIT time, be the following: the response of this fault is determined by the value of Ignore the TON_MAX_FAULT_RESPONSE command value.
  • Page 38: External Overtemperature And Undertemperature Fault Response

    LTM4700 OPERATION be ignored. Internal temperature limits cannot be adjusted FAULT LOGGING by the user. See Table 15. The LTM4700 has fault logging capability. Data is logged into memory in the order shown in Table 19. The data is External Overtemperature and Undertemperature stored in a continuously updated buffer in RAM.
  • Page 39: Similarity Between Pmbus, Smbus And I 2 C 2-Wire Interface

    LTM4700 OPERATION primarily to the MFR_FAULT_LOG command. The timeout PMBus SERIAL DIGITAL INTERFACE period defaults to 32ms. The LTM4700 communicates with a host (master) using the The user is encouraged to use as high a clock rate as standard PMBus serial bus interface. The Timing Diagram, possible to maintain efficient data packet transfer between Figure 6, shows the timing relationship of the signals on all devices sharing the serial bus interface.
  • Page 40 LTM4700 OPERATION Refer to Figure 7 for a legend. Handshaking features are included to ensure robust system communication. Please refer to the PMBus Communication and Command Processing subsection of the Applications Information section for further details. SU(DAT) HD(SDA) HD(STA) SU(STA) SU(STO) HD(DAT) HIGH...
  • Page 41: Figures 7 To 24 Pmbus Protocols

    LTM4700 OPERATION FIGURES 7 TO 24 PMBus PROTOCOLS START CONDITION REPEATED START CONDITION READ (BIT VALUE OF 1) WRITE (BIT VALUE OF 0) ACKNOWLEDGE (THIS BIT POSITION MAY BE 0 FOR AN ACK OR 1 FOR A NACK) STOP CONDITION PEC PACKET ERROR CODE MASTER TO SLAVE SLAVE TO MASTER...
  • Page 42 LTM4700 OPERATION SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS DATA BYTE 4700 F15 Figure 15. Read Byte Protocol SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS DATA BYTE 4700 F16 Figure 16. Read Byte Protocol with PEC SLAVE ADDRESS Wr A COMMAND CODE...
  • Page 43 LTM4700 OPERATION SLAVE ADDRESS Wr A COMMAND CODE BYTE COUNT = M DATA BYTE 1 … DATA BYTE 2 … DATA BYTE M … SLAVE ADDRESS Rd A BYTE COUNT = N DATA BYTE 1 … … DATA BYTE 2 …...
  • Page 44: Pmbus Command Summary

    LTM4700 PMBus COMMAND SUMMARY PMBus COMMANDS the manufacturer. Attempting to access non-supported or reserved commands may result in a CML command fault Table 7 lists supported PMBus commands and manufac- event. All output voltage settings and measurements are turer specific commands. A complete description of these based on the VOUT_MODE setting of 0x14.
  • Page 45 LTM4700 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE VOUT_MARGIN_LOW 0x26 Margin low output voltage set point. Must R/W Word 0.95 be less than VOUT_COMMAND.
  • Page 46 LTM4700 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE TON_DELAY 0x60 Time from RUN and/or Operation on to R/W Word output rail turn-on.
  • Page 47 LTM4700 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE MFR_ID 0x99 The manufacturer ID of the LTM4700 in R String ASCII.
  • Page 48 LTM4700 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE MFR_CLEAR_PEAKS 0xE3 Clears all peak values. Send Byte MFR_READ_ICHIP 0xE4 Measured supply current of the SV...
  • Page 49 LTM4700 PMBus COMMAND SUMMARY Table 8. Data Format Abbreviations Linear_5s_11s PMBus data field b[15:0] Value = Y • 2 where N = b[15:11] is a 5-bit two’s complement integer and Y = b[10:0] is an 11-bit two’s complement integer Example: For b[15:0] = 0x9807 = ‘b10011_000_0000_0111 –13 –6...
  • Page 50: Applications Information

    LTM4700 APPLICATIONS INFORMATION TO V STEP-DOWN RATIOS OUTPUT CAPACITORS There are restrictions in the maximum V and V step- The LTM4700 is designed for low output voltage ripple down ratio that can be achieved for a given input voltage. noise and good transient response. The bulk output Each output of the LTM4700 is capable of 95% duty cycle capacitors defined as C are chosen with low enough...
  • Page 51: Switching Frequency And Phase

    LTM4700 APPLICATIONS INFORMATION current comparator, I , turns off the bottom MOSFET pin-strap settings on the FSWPH_CFG pin (see Table 3). just before the inductor current reaches zero, preventing Using MFR_CONFIG_ALL[4] = 1b, the LTM4700s SYNC pin it from reversing and going negative. Thus, the controller becomes a high impedance input, only—i.e., it does not can operate in discontinuous (pulse-skipping) operation.
  • Page 52: Output Current Limit Programming

    LTM4700 APPLICATIONS INFORMATION values are indicated with 0° corresponding to the falling Table 9. Recommended Switching Frequency for Various V edge of SYNC being coincident with the turn-on of the to-V Step-Down Scenarios top MOSFETs, MTn. 0.9V The MFR_PWM_CONFIG command can be altered via 1.0V 350kHz to 425kHz C commands, but only when switching action is dis-...
  • Page 53: Minimum On-Time Considerations

    ADC reading. At power-up this mode SHARE_CLK pin (all Analog Devices ICs are configured engages after TON_MAX_FAULT_LIMIT unless the limit to allow the fastest SHARE_CLK signal to control the tim- is set to 0 (infinite).
  • Page 54: Soft Off (Sequenced Off)

    LTM4700 APPLICATIONS INFORMATION This same point in time is when the output changes from SOFT OFF (SEQUENCED OFF) discontinuous to the programmed mode as indicated in In addition to a controlled start-up, the LTM4700 also sup- MFR_PWM_MODE bit 0. Refer to Figure 25 for details on ports controlled turn-off.
  • Page 55: Undervoltage Lockout

    LTM4700 APPLICATIONS INFORMATION UNDERVOLTAGE LOCKOUT some other portion of the system. The fault response is configurable and allows the following options: The LTM4700 is initialized by an internal threshold-based UVLO where VIN must be approximately 4V and INTVCC, Ignore VDD33, and VDD25 must be within approximately 20% of Shut Down Immediately—Latch Off their regulated values.
  • Page 56: Phase-Locked Loop And Frequency Synchronization

    LTM4700 APPLICATIONS INFORMATION All the above pins have on-chip pull-down transistors that PHASE-LOCKED LOOP AND FREQUENCY can sink 3mA at 0.4V. The low threshold on the pins is SYNCHRONIZATION 0.8V; thus, there is plenty of margin on the digital signals The LTM4700 has a phase-locked loop (PLL) comprised with 3mA of current.
  • Page 57: Input Current Sense Amplifier

    LTM4700 APPLICATIONS INFORMATION to avoid this problem. Multiple LTM4700s are required By adjusting the g and R only, the LTM4700 can COMP to share one SYNC pin in PolyPhase configurations. provide a flexible Type II compensation network to optimize For other configurations, connecting the SYNC pins to the loop over a wide range of output capacitors.
  • Page 58: Checking Transient Response

    LTM4700 APPLICATIONS INFORMATION The COMPna series internal R and external C COMP COMPna TYPE II COMPENSATION filter sets the dominant pole-zero loop compensation. The GAIN internal R value can be modified (from 0Ω to 62kΩ) COMP using bits[4:0] of the MFR_PWM_ COMP command. Adjust the value of R to optimize transient response once the COMP...
  • Page 59: Polyphase Configuration

    LTM4700 APPLICATIONS INFORMATION in output voltage if the load switch resistance is low and CONNECTING THE USB TO I C/SMBUS/PMBUS it is driven quickly. If the ratio of C to C is greater CONTROLLER TO THE LTM4700 IN SYSTEM LOAD than 1:50, the switch rise time should be controlled so that The ADI USB-to-I C/SMBus/PMBus adapter (DC1613A or...
  • Page 60: Ltpowerplay: An Interactive Gui For Digital Power

    When this bit is set, the part is ready for another system or to diagnose power issues when bring up rails. command. An example polling loop is provided in Figure LTpowerPlay utilizes Analog Devices’ USB-to-I C/SMBus/ 34 which ensures that commands are processed in order PMBus adapter to communication with one of the many while simplifying error handling routines.
  • Page 61 LTM4700 APPLICATIONS INFORMATION Figure 31. LTpowerPlay Screen Shot WRITE COMMAND DATA BUFFER PMBus DECODER INTERNAL WRITE PAGE 0x00 PROCESSOR • CMDS FETCH, • • CONVERT 0x21 DATA DATA VOUT_COMMAND • EXECUTE • • MFR_RESET 0xFD CALCULATIONS PENDING 4700 F32 Figure 32. Write Command Data Processing Rev.
  • Page 62: Thermal Considerations And Output Current Derating

    LTM4700 APPLICATIONS INFORMATION protocol. Depending on part configuration it may either It is recommended that all command writes (write byte, NACK the command or return all ones (0xFF) for reads. It write word, etc.) be preceded with a polling loop to avoid may also generate a BUSY fault and ALERT notification, the extra complexity of dealing with busy behavior and or stretch the SCL clock low.
  • Page 63 LTM4700 APPLICATIONS INFORMATION µModule regulator’s thermal performance in their appli- resistance value may be useful for comparing pack- cation at various electrical and environmental operating ages but the test conditions don’t generally match the conditions to compliment any FEA activities. Without FEA user’s application.
  • Page 64 LTM4700 APPLICATIONS INFORMATION parameters defined by JESD51-12 or provided in the and the specified PCB with all of the correct material Pin Configuration section replicates or conveys normal coefficients along with accurate power loss source defini- operating conditions of a µModule regulator. For example, tions;...
  • Page 65 LTM4700 APPLICATIONS INFORMATION resistance for the LTM4700 with various heat sinking and ing temperature specifies how much module temperature airflow conditions. These thermal resistances represent rise can be allowed. As an example in Figure 40, the load demonstrated performance of the LTM4700 on hardware; current is derated to ~80A at ~75°C ambient with no air a 8-layer FR4 PCB measuring 99mm ×...
  • Page 66 LTM4700 APPLICATIONS INFORMATION Table 13. LTM4700 Channel Output Voltage Response vs Component Matrix. Typical Measured Values OUTL VENDORS PART NUMBER Description VENDORS PART NUMBER Description OUTH Murata GRM31CR60G107ME39L 100µF, 4V, X5R, 1206 PANASONIC EEF-GX0E471L 470µF, 2.5V, 3mΩ Taiyo Yuden AMK316BJ107ML 100µF, 4V, X5R, 1206 C3216X5R0G107M160AB 100µF, 4V, X5R, 1206...
  • Page 67 LTM4700 APPLICATIONS INFORMATION POSCAP and Ceramic Output Capacitors, Single Output Setup, 25A (25%) Load Stepping at 10A/µS RCOMP EA-GM VOUTn_CFG VTRIMn_CFG (Programable) (Programable) Pin-Strap Pin-Strap (MFR_PWM_ (MFR_PWM_ Resistor Resistor COMP COMP to SGND to SGND Load PK-PK Recovery OUTHn OUTLn (Ceramic (Bulk Output COMP0a...
  • Page 68: Applications Information-Derating Curves

    LTM4700 APPLICATIONS INFORMATION-DERATING CURVES = 5V, 350kHz = 5V, 425kHz = 5V, 500kHz = 12V, 350kHz = 12V, 425kHz = 12V, 500kHz 20 30 40 60 70 80 90 100 20 30 40 60 70 80 90 100 20 30 40 60 70 80 90 100 LOAD CURRENT (A) LOAD CURRENT (A)
  • Page 69: Emi Performance

    LTM4700 APPLICATIONS INFORMATION SAFETY CONSIDERATIONS EMI PERFORMANCE The SWn pin provides access to the midpoint of the power The LTM4700 modules do not provide galvanic isolation to V . There is no internal fuse. If required, MOSFETs in LTM4700’s power stages. from V a slow blow fuse with a rating twice the maximum input Connecting an optional series RC network from SWn to...
  • Page 70 LTM4700 APPLICATIONS INFORMATION Do not put vias directly on pads, unless they are capped For parallel modules, tie the V , ,V OUTn OSNSn OSNSn or plated over. voltage-sense differential pair lines, RUNn, , COMPna, COMP pin together. The user must share the SYNC, Use a separate SGND copper plane for components SHARE_CLK, FAULT, and ALERT pins of these parts.
  • Page 71: Typical Applications

    LTM4700 TYPICAL APPLICATIONS 2.2µF 22µF PGOOD0 PGOOD1 DD33 RSNUB0 5.75V TO 16V CSNUB0 150µF 1mΩ 22µF – ×6 OUT0 1V, 50A OUT0 OSNS0 100µF 470µF LOAD0 ×4 ×2 – OSNS0 RSNUB1 DD33 LTM4700 CSNUB1 4.99k OUT1 1.5V, 50A OUT1 OSNS1 RUN1 100µF 470µF...
  • Page 72 LTM4700 TYPICAL APPLICATIONS 2.2µF PGOOD0 PGOOD1 DD33 4.5V TO 5.75V 150µF 1mΩ 22µF – ×6 OUT0 0.8V, 50A OUT0 OSNS0 100µF 470µF LOAD0 ×4 ×2 – OSNS0 DD33 LTM4700 4.99k OUT1 1.2V, 50A OUT1 OSNS1 RUN1 100µF 470µF LOAD1 ×4 ON/OFFCONFIG ×2 –...
  • Page 73 LTM4700 TYPICAL APPLICATIONS 2.2µF 22µF 4.99k PGOOD DD33 5.75V TO 16V OUT0 100µF 22µF 470µF ×4 150µF – OSNS0 ×6 ×2 – OSNS0 DD33 OUT1 4.99k LTM4700 100µF 470µF OSNS1 ×4 RUN1 ×2 – ON/OFF CONTROL OSNS1 RUN0 FAULT INTERRUPTS FAULT0 FAULT1 ALERT...
  • Page 74 LTM4700 TYPICAL APPLICATIONS 5V BIAS 2.2µF DD33 PGOOD0 PGOOD1 3.3V 22µF OUT0 220µF – OUT0 ×5 1V AT 50A 100µF ×3 TC75H09F4 OSNS0 330µF LOAD – × 2 5V BIAS OSNS0 DD33 5V BIAS ~50mA OUT1 OUT1 LTM4700 100µF 1.2V AT 50A 4.99k ×3 RUN1...
  • Page 75 LTM4700 TYPICAL APPLICATIONS 4.99k 22µF 22µF 2.2µF 2.2µF PGOOD PGOOD DD33 5.75V TO 16V OUT0 22µF OUT0 ×4 470µF – – 100µF OSNS0 150µF 22µF OSNS0 ×4 ×8 ×4 – – OSNS0 OSNS0 DD33 OUT1 OUT1 4.99k 100µF 470µF OSNS1 LTM4700 OSNS1 LTM4700...
  • Page 76: Pmbus Command Details

    LTM4700 PMBus COMMAND DETAILS ADDRESSING AND WRITE PROTECT DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE 0x00 Provides integration with multi-page PMBus devices. R/W Byte 0x00 PAGE_PLUS_WRITE 0x05 Write a supported command directly to a PWM channel. W Block PAGE_PLUS_READ 0x06 Read a supported command directly from a PWM Block...
  • Page 77 LTM4700 PMBus COMMAND DETAILS The value stored in the PAGE command is not affected by PAGE_PLUS_READ. If PAGE_PLUS_READ is used to access data from a non-paged command, the Page Number byte is ignored. This command uses the Process Call protocol. An example of the PAGE_PLUS_READ command with PEC is shown in Figure 52.
  • Page 78: General Configuration Commands

    LTM4700 PMBus COMMAND DETAILS MFR_ADDRESS The MFR_ADDRESS command byte sets the 7 bits of the PMBus slave address for this device. Setting this command to a value of 0x80 disables device addressing. The GLOBAL device address, 0x5A and 0x5B, cannot be deactivated. If RCONFIG is set to ignore, the ASEL pin is still used to determine the LSB of the channel address.
  • Page 79: On/Off/Margin

    LTM4700 PMBus COMMAND DETAILS A ShortCycle event occurs whenever the PWM channel is commanded back ON, or reactivated, after the part has been commanded OFF and is processing either the TOFF_DELAY or the TOFF_FALL states. The PWM channel can be turned ON and OFF through either the RUN pin and or the PMBus OPERATION command.
  • Page 80 LTM4700 PMBus COMMAND DETAILS ON_OFF_CONFIG The ON_OFF_CONFIG command specifies the combination of RUNn pin input state and PMBus commands needed to turn the PWM channel on and off. Supported Values: VALUE MEANING 0x1F OPERATION value and RUNn pin must both command the device to start/run. Device executes immediate off when commanded off. 0x1E OPERATION value and RUNn pin must both command the device to start/run.
  • Page 81: Pwm Configuration

    LTM4700 PMBus COMMAND DETAILS PWM CONFIGURATION DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE MFR_PWM_COMP 0xD3 PWM loop compensation configuration R/W Byte 0x28 MFR_PWM_MODE 0xD4 Configuration for the PWM engine. R/W Byte 0xC7 MFR_PWM_CONFIG 0xF5 Set numerous parameters for the DC/DC controller R/W Byte 0x10...
  • Page 82 LTM4700 PMBus COMMAND DETAILS For both equations, –14 G = MFR_TEMP_1_GAIN • 2 , and O = MFR_TEMP_1_OFFSET Bit[2] is now reserved, and Ultra Low DCR mode is default. Bit[1] of this command determines if the part is in high range or low voltage range. Changing this bit value changes the PWM loop gain and compensation.
  • Page 83 LTM4700 PMBus COMMAND DETAILS 01111b 10000b 10001b 10010b 10011b 10100b 10101b 10110b 10111b 11000b 11001b 11010b 11011b 11100b 11101b 11110b 11111b This command has one data byte. MFR_PWM_CONFIG The MFR_PWM_CONFIG command sets the switching frequency phase offset with respect to the falling edge of the SYNC signal.
  • Page 84: Voltage

    LTM4700 PMBus COMMAND DETAILS FREQUENCY_SWITCH The FREQUENCY_SWITCH command sets the switching frequency, in kHz, of the LTM4700. Supported Frequencies: VALUE [15:0] RESULTING FREQUENCY (TYP) 0x0000 External Oscillator 0xF3E8 250kHz 0xFABC 350kHz 0xFB52 425kHz 0xFBE8 500kHz 0x023F 575kHz 0x028A 650kHz 0x02EE 750kHz 0x03E8 1000kHz...
  • Page 85: Output Voltage And Limits

    LTM4700 PMBus COMMAND DETAILS VIN_UV_WARN_LIMIT The VIN_UV_WARN_LIMIT command sets the value of input voltage measured by the ADC that causes an input under- voltage warning. This warning is disabled until the input exceeds the input startup threshold value set by the VIN_ON command and the unit has been enabled.
  • Page 86 LTM4700 PMBus COMMAND DETAILS VOUT_MODE The data byte for VOUT_MODE command, used for commanding and reading output voltage, consists of a 3-bit mode (only linear format is supported) and a 5-bit parameter representing the exponent used in output voltage Read/Write commands.
  • Page 87 LTM4700 PMBus COMMAND DETAILS VOUT_MARGIN_HIGH The VOUT_MARGIN_HIGH command loads the unit with the voltage to which the output is to be changed, in Volts, when the OPERATION command is set to “Margin High”. The value should be greater than VOUT_COMMAND. The maximum guaranteed value on VOUT_MARGIN_HIGH is 5.5V.
  • Page 88: Output Current And Limits

    LTM4700 PMBus COMMAND DETAILS MFR_VOUT_MAX The MFR_VOUT_MAX command is the maximum output voltage in volts for each channel, including VOUT_OV_FAULT_ LIMIT. If the output voltages are set to high range (Bit 6 of MFR_PWM_CONFIG set to a 0) MFR_VOUT_MAX is 3.6V. If the output voltage is set to low range (Bit 6 of MFR_PWM_CONFIG set to a 1) the MFR_VOUT_MAX is 2.75V.
  • Page 89 LTM4700 PMBus COMMAND DETAILS IOUT_OC_FAULT_LIMIT The IOUT_OC_FAULT_LIMIT command sets the value of the peak output current limit, in Amperes. When the control- ler is in current limit, the overcurrent detector will indicate an overcurrent fault condition. The following table lists the –...
  • Page 90: Input Current And Limits

    LTM4700 PMBus COMMAND DETAILS IOUT_OC_WARN_LIMIT This command sets the value of the output current measured by the ADC that causes an output overcurrent warning in Amperes. The READ_IOUT value will be used to determine if this limit has been exceeded. In response to the IOUT_OC_WARN_LIMIT being exceeded, the device: •...
  • Page 91: Temperature

    LTM4700 PMBus COMMAND DETAILS TEMPERATURE External Temperature Calibration DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE MFR_TEMP_1_GAIN 0xF8 Sets the slope of the external temperature R/W Word 0.995 sensor. 0x3FAE MFR_TEMP_1_OFFSET 0xF9 Sets the offset of the external temperature R/W Word sensor.
  • Page 92: Timing

    LTM4700 PMBus COMMAND DETAILS In response to the OT_WARN_LIMIT being exceeded, the device: • Sets the TEMPERATURE bit in the STATUS_BYTE • Sets the Overtemperature Warning bit in the STATUS_TEMPERATURE command, and • Notifies the host by asserting ALERT pin, unless masked This command has two data bytes and is formatted in Linear_5s_11s format.
  • Page 93: Timing-Off Sequence/Ramp

    LTM4700 PMBus COMMAND DETAILS TON_MAX_FAULT_LIMIT The TON_MAX_FAULT_LIMIT command sets the value, in milliseconds, on how long the unit can attempt to power up the output without reaching the output undervoltage fault limit. A data value of 0ms means that there is no limit and that the unit can attempt to bring up the output voltage indefinitely. The maximum limit is 83 seconds.
  • Page 94: Precondition For Restart

    LTM4700 PMBus COMMAND DETAILS TOFF_MAX_WARN_LIMIT The TOFF_MAX_WARN_LIMIT command sets the value, in milliseconds, on how long the output voltage exceeds 12.5% of the programmed voltage before a warning is asserted. The output is considered off when the V voltage is less than 12.5% of the programmed VOUT_COMMAND value. The calculation begins after TOFF_FALL is complete. A data value of 0ms means that there is no limit and that the output voltage exceeds 12.5% of the programmed voltage indefinitely.
  • Page 95: Fault Responses Input Voltage

    LTM4700 PMBus COMMAND DETAILS Fault Responses Input Voltage DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE VIN_OV_FAULT_RESPONSE 0x56 Action to be taken by the device when an R/W Byte 0x80 input supply overvoltage fault is detected. VIN_OV_FAULT_RESPONSE The VIN_OV_FAULT_RESPONSE command instructs the device on what action to take in response to an input over- voltage fault.
  • Page 96 LTM4700 PMBus COMMAND DETAILS 0xB8–The device shuts down (disables the output) and device attempts to retry continuously, without limitation, until it is commanded OFF (by the RUN pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down.
  • Page 97 LTM4700 PMBus COMMAND DETAILS The UV fault and warn are masked until the following criteria are achieved: 1) The TON_MAX_FAULT_LIMIT has been reached 2) The TON_DELAY sequence has completed 3) The TON_RISE sequence has completed 4) The VOUT_UV_FAULT_LIMIT threshold has been reached 5) The IOUT_OC_FAULT_LIMIT is not present The UV fault and warn are masked whenever the channel is not active.
  • Page 98: Fault Responses Output Current

    LTM4700 PMBus COMMAND DETAILS TON_MAX_FAULT_RESPONSE The TON_MAX_FAULT_RESPONSE command instructs the device on what action to take in response to a TON_MAX fault. The data byte is in the format given in Table 13. The device also: • Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE •...
  • Page 99: Fault Responses Ic Temperature

    LTM4700 PMBus COMMAND DETAILS Table 16. IOUT_OC_FAULT_RESPONSE Data Byte Contents BITS DESCRIPTION VALUE MEANING Response The LTM4700 continues to operate indefinitely while maintaining the output current at the value set by For all values of bits [7:6], the LTM4700: IOUT_OC_FAULT_LIMIT without regard to the output •...
  • Page 100: Fault Responses External Temperature

    LTM4700 PMBus COMMAND DETAILS Table 17. Data Byte Contents MFR_OT_FAULT_RESPONSE BITS DESCRIPTION VALUE MEANING Response Not supported. Writing this value will generate a CML fault. For all values of bits [7:6], the LTM4700: Not supported. Writing this value will generate a CML fault •...
  • Page 101: Fault Sharing

    LTM4700 PMBus COMMAND DETAILS This condition is detected by the ADC so the response time may be up to t CONVERT This command has one data byte. Table 18. Data Byte Contents: TON_MAX_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE, OT_FAULT_RESPONSE, UT_FAULT_RESPONSE BITS DESCRIPTION VALUE MEANING Response The PMBus device continues operation without interruption.
  • Page 102 LTM4700 PMBus COMMAND DETAILS Table 19. FAULTn Propagate Fault Configuration The FAULT0 and FAULT1 pins are designed to provide electrical notification of selected events to the user. Some of these events are common to both output channels. Others are specific to an output channel. They can also be used to share faults between channels. BIT(S) SYMBOL OPERATION...
  • Page 103: Fault Sharing Response

    LTM4700 PMBus COMMAND DETAILS Fault Sharing Response DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE MFR_FAULT_RESPONSE 0xD5 Action to be taken by the device when the R/W Byte 0xC0 FAULT pin is asserted low. MFR_FAULT_RESPONSE The MFR_FAULT_RESPONSE command instructs the device on what action to take in response to the FAULTn pin being pulled low by an external source.
  • Page 104: Identification

    LTM4700 PMBus COMMAND DETAILS USER_DATA_00 through USER_DATA_04 These commands are non-volatile memory locations for customer storage. The customer has the option to write any value to the USER_DATA_nn at any time. However, the LTpowerPlay software and contract manufacturers use some of these commands for inventory control.
  • Page 105: Fault Warning And Status

    LTM4700 PMBus COMMAND DETAILS FAULT WARNING AND STATUS DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE CLEAR_FAULTS 0x03 Clear any fault bits that have been set. Send Byte SMBALERT_MASK 0x1B Mask activity. Block R/W See CMD Details MFR_CLEAR_PEAKS 0xE3 Clears all peak values.
  • Page 106 LTM4700 PMBus COMMAND DETAILS would still set bit 6 of STATUS_TEMPERATURE but not assert ALERT. All other supported STATUS_TEMPERATURE bits would continue to assert ALERT if set. Figure 53 shows an example of the Block Write – Block Read Process Call protocol used to read back the present state of any supported status register, again without PEC.
  • Page 107 LTM4700 PMBus COMMAND DETAILS STATUS_BYTE Message Contents: STATUS BIT NAME MEANING BUSY A fault was declared because the LTM4700 was unable to respond. This bit is set if the channel is not providing power to its output, regardless of the reason, including simply not being enabled.
  • Page 108 LTM4700 PMBus COMMAND DETAILS The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear status by means other than using the CLEAR_FAULTS command. Any supported fault bit in this command will initiate an ALERT event. This command has one data byte.
  • Page 109 LTM4700 PMBus COMMAND DETAILS STATUS_TEMPERATURE The STATUS_TEMPERATURE commands returns one byte with status information on temperature. This is a paged command and is related to the respective READ_TEMPERATURE_1 value. STATUS_TEMPERATURE Message Contents: MEANING External overtemperature fault. External overtemperature warning. Not supported (LTM4700 returns 0). External undertemperature fault.
  • Page 110 LTM4700 PMBus COMMAND DETAILS STATUS_MFR_SPECIFIC The STATUS_MFR_SPECIFIC commands returns one byte with the manufacturer specific status information. The format for this byte is: MEANING Internal Temperature Fault Limit Exceeded. Internal Temperature Warn Limit Exceeded. Factory Trim Area NVM CRC Fault. PLL is Unlocked Fault Log Present UV or OV Fault...
  • Page 111: Telemetry

    LTM4700 PMBus COMMAND DETAILS MFR_COMMON The MFR_COMMON command contains bits that are common to all ADI digital power and telemetry products. MEANING Chip Not Driving ALERT Low LTM4700 Not Busy Calculations Not Pending LTM4700 Outputs Not in Transition NVM Initialized Reserved SHARE_CLK Timeout WP Pin Status...
  • Page 112 LTM4700 PMBus COMMAND DETAILS READ_VIN The READ_VIN command returns the measured V pin voltage, in volts added to READ_ICHIP • MFR_RVIN. This compensates for the IR voltage drop across the V filter element due to the supply current of the LTM4700. This read-only command has two data bytes and is formatted in Linear_5s_11s format.
  • Page 113 LTM4700 PMBus COMMAND DETAILS READ_PIN The READ_PIN command is a reading of the DC/DC converter input power in Watts. PIN is calculated based on the most recent input voltage and current reading. This read-only command has 2 data bytes and is formatted in Linear_5s_11s format. MFR_PIN_ACCURACY The MFR_PIN_ACCURACY command returns the accuracy, in percent, of the value returned by the READ_PIN command.
  • Page 114 LTM4700 PMBus COMMAND DETAILS MFR_READ_ICHIP The MFR_READ_ICHIP command returns the measured input current, in Amperes, used by the LTM4700. This command has two data bytes and is formatted in Linear_5s_11s format. MFR_TEMPERATURE_2_PEAK The MFR_TEMPERATURE_2_PEAK command reports the highest temperature, in degrees Celsius, reported by the READ_TEMPERATURE_2 measurement.
  • Page 115: Nvm Memory Commands

    LTM4700 PMBus COMMAND DETAILS NVM MEMORY COMMANDS Store/Restore DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE STORE_USER_ALL 0x15 Store user operating memory to Send Byte EEPROM. RESTORE_USER_ALL 0x16 Restore user operating memory from Send Byte EEPROM. MFR_COMPARE_USER_ALL 0xF0 Compares current command contents Send Byte with NVM.
  • Page 116: Fault Logging

    LTM4700 PMBus COMMAND DETAILS Fault Logging DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE MFR_FAULT_LOG 0xEE Fault log data bytes. R Block MFR_FAULT_LOG_ STORE 0xEA Command a transfer of the fault log from RAM Send Byte to EEPROM.
  • Page 117 LTM4700 PMBus COMMAND DETAILS Table 20. Fault Logging This table outlines the format of the block data from a read block data of the MFR_FAULT_LOG command. Data Format Definitions LIN 11 = PMBus = Rev 1.2, Part 2, section 7.1 LIN 16 = PMBus Rev 1.2, Part 2, section 8.
  • Page 118 LTM4700 PMBus COMMAND DETAILS CYCLICAL DATA EVENT n Event “n” represents one complete cycle of ADC reads through the MUX at time of fault. Example: If the fault occurs when the ADC is processing (Data at Which Fault Occurred; Most Recent Data) step 15, it will continue to take readings through step 25 and then store the header and all 6 event pages to EEPROM READ_VOUT (PAGE 0)
  • Page 119 LTM4700 PMBus COMMAND DETAILS EVENT n-1 (data measured before fault was detected) READ_VOUT (PAGE 0) [15:8] LIN 16 [7:0] LIN 16 READ_VOUT (PAGE 1) [15:8] LIN 16 [7:0] LIN 16 READ_IOUT (PAGE 0) [15:8] LIN 11 [7:0] LIN 11 READ_IOUT (PAGE 1) [15:8] LIN 11 [7:0]...
  • Page 120: Block Memory Write/Read

    LTM4700 PMBus COMMAND DETAILS Table 21. Explanation of Position_Fault Values POSITION_FAULT VALUE SOURCE OF FAULT LOG 0xFF MFR_FAULT_LOG_STORE 0x00 TON_MAX_FAULT 0x01 VOUT_OV_FAULT 0x02 VOUT_UV_FAULT 0x03 IOUT_OC_FAULT 0x05 TEMP_OT_FAULT 0x06 TEMP_UT_FAULT 0x07 VIN_OV_FAULT 0x0A MFR_TEMP_2_OT_FAULT MFR_INFO Contact the factory for details. MFR_FAULT_LOG_CLEAR The MFR_FAULT_LOG_CLEAR command will erase the fault log file stored values.
  • Page 121: Typical Applications

    LTM4700 TYPICAL APPLICATIONS 100A, 0.9V Output DC/DC µModule Regulator with I C/SMBus/PMBus Serial Interface 2.2µF 22µF PGOOD DD33 5.75V TO 16V 22µF 1mΩ 150µF OUT0 0.9V AT 100A ×6 – 220µF LOAD ×12 1Ω OSNS0 – OSNS0 DD33 4.99k OUT1 LTM4700 RUN1 ON/OFFCONFIG...
  • Page 122: Package Description

    LTM4700 PACKAGE DESCRIPTION PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY . Table 22. LTM4700 BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION OUT1 OUT1...
  • Page 123 LTM4700 PACKAGE DESCRIPTION Table 22. LTM4700 BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PGOOD1 SVIN INTV BIAS OUT0 OUT0 – COMP0a OUT0 OUT0 – PGOOD0 TSNS0b OSNS0 OSNS0 OUT0 OUT0...
  • Page 124 LTM4700 PACKAGE DESCRIPTION aaa Z Rev. B For more information www.analog.com...
  • Page 125: Revision History

    Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications For more information www.analog.com subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
  • Page 126: Package Photograph

    2. Search using the Quick Power Search parametric table. Digital Power System Management Analog Devices’ family of digital power supply management ICs are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature EEPROM for storing user configurations and fault logging.

Table of Contents