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Block diagram
VBUS
DM
DP
USB
HDD0 to HDD15, HDA0 to HDA2
XHCS0, XHCS1
XHDASP, XHPDIAG
XHDMACK, XHIORDY
XHIOR, XHIOW
XHRESET
HDMARQ, HINTRQ
TO
HDD
3.3V
UNIT
3.3V REG.
VCCB, VCC1.8V
VCC3.3V, VCC_CORE
EACH BLOCK
CONTROLLER
DC IN
EACH BLOCK
BAT
BATTERY
TDI
TMS
TCK
TDO
nTRST
NRESET
FOR TEST
2-1
IC280
VCC
HDD_EN
NRESET
SYS_EN, PWR_EN
NVDD_FAULT, NBATT_FAULT
PWR_SDA, PWR_SCL
IC160
PWM
IC180
XRST
RESET
VCC
VCC
VCCB
IC100,IC110
BATT_SW
IC130,IC131
Q130,Q131
DET. & SW
VCC
BAT1
BAT2
RED_LED
IC120,IC150
BATTERY
CHARGE_STATE2
CHARGER
KP_DKIN0
TS
GPIO
IC155
SW
SCL
IC140
SDA
GAS
GAUGE
XWRH
XWRL
IC220
OR GATE
OE, CS4
HDD_INT
IC200
HDD_RESET
DREQ0, DREQ1
HDD/USB
DVAL0, DVAL1
CONTROLLER
A3 to A9
DATA0 to DATA15
X200
12MHz
1.8V
IC560
IC550
1.8V REG.
SDRAM
S120
BAT SW
D290,D291
Q290,Q291
LED RED/BLUE
JACK_DET
SW
S290
POWER SW
PWE
DQM0
DQM1
WE, SDCS0
SDCAS, SDRAS
SDCKE, SDCLK1
DQM0 to DQM3
A10 to A24
DATA0 to DATA31
IC400
LED1
LED2
VCC_BAT
S400
RESET SW
X401
32.768kHz
X400
13MHz
PWR_EN
GSENSOR_D
CPU
WE, OE, CS0
SDCAS, SDC
A2 to A25
DATA0 to DA
RESET_OUT
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