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H
G
BLOCK DIAGRAM 003 (AFC1)
CPU BUS
1
FPGA BUS
MAIN
/RST1
/WR1
/RD1
Driver
IC074
(20p)
(20p)
IC075
p.16
SYNCI[1],CKI[1]
/D6CS[1]
/D6WAIT[1]
2
SYNCI[1],CKI[1]
/D6CS[2]
/D6WAIT[2]
SYNCI[2],CKI[2]
/D6CS[3]
/D6WAIT[3]
A[101-107]
SYNCI[2],CKI[2]
D[100-115]
/D6CS[4]
3
D6WAIT[4]
A[201-207]
D[200-215]
/RST2
/WR2
/RD2
SYNCI[4],CKI[4]
/D6CS[7]
4
/D6WAIT[7]
SYNCI[4],CKI[4]
/D6CS[8]
/D6WAIT[8]
SYNCI[5],CKI[5]
/D6CS[9]
/D6WAIT[9]
/D6CS[1-10]
SYNCI[5],CKI[5]
/D5CS[1-3]
5
/D6WAIT[1-10]
/D5WAIT[1-3]
/D6CS[10]
/D6WAIT[10]
6
28CA1-8828138-003
4
F
X004
/SYNCO,CKO
p.21
60MHz
D51S[16-19]
DSP6
IC077(176p)
DRAM
16Mbit x 2
D51S[20-23]
IC076,IC078
(42p) (42p)
p.16
D51S[24-27]
DSP5
DSP6
IC080(176p)
DRAM
IC106
16Mbit x 2
D51S[28-31]
(208p)
IC079,IC081
(42p) (42p)
p.16
D51S[32-35]
DSP6
IC083(176p)
DRAM
16Mbit x 2
D51S[36-39]
IC082,IC084
(42p) (42p)
p.17
D51S[40-43]
DSP6
IC086(176p)
DRAM
MCKD
16Mbit x 2
D51S[44-47]
IC085,IC087
IC
WR RD
CS
WAIT
(42p) (42p)
p.17
10
13
19
27
28
26
65
10
13
19
27
28
26
IC
WR RD
CS
D52S[16-19]
DSP6 IC095(176p)
DRAM
D52S[20-23]
16Mbit x 2
IC094,IC096
(42p) (42p)
p.19
D52S[24-27]
DSP6 IC098(176p)
DRAM
D52S[28-31]
16Mbit x 2
IC097,IC099
(42p) (42p)
p.19
DSP5
D52S[32-35]
DSP6
IC101(176p)
MCKD
IC107
(208p)
SSYNC
DRAM
D52S[36-39]
16Mbit x 2
IC100,IC102
(42p) (42p)
p.20
D52S[40-43]
DSP6
IC104(176p)
DRAM
D52S[44-47]
16Mbit x 2
IC103,IC105
(42p) (42p)
p.20
p.21
FS128_2,SSYNC2
FS128_1,SSYNC1
E
D
D51S[48-51]
SYNCI[3],CKI[3]
DSP6
IC089(176p)
DRAM
16Mbit x 2
/D6CS[5]
D51S[52-55]
IC088,IC090
p.18
(42p) (42p)
/D6WAIT[5]
MY slot BUS
D51S[56-59]
SYNCI[3],CKI[3]
DSP6
IC092(176p)
DRAM
16Mbit x 2
D51S[60-63]
/D6CS[6]
IC091,IC093
(42p) (42p)
p.18
/D6WAIT[6]
p.22
SIN[1-4]
D51S[8-11]
SIN[5-8]
SOUT[1-4]
D51S[12-15]
DSP5
SOUT[5-8]
SIN[9-12]
IC110
17
(208p)
17
SIN[13-16]
MCKD
SOUT[9-12]
SOUT[13-16]
10
SYNCI[6],CKI[6]
13
26
CS
/D5CS[3],/D5WAIT[3]
65
WAIT
D52S[8-11]
D52S[12-15]
X003
24.576MHz
(Fs=48kHz)
IC22
5,6
2
22
23
WCKIN
DIR2
Selector
IC027(16p)
IC028(44p)
36
p.10
p.10
6-10
FS256
17
FS128
Driver
SSYNC
IC066 (20p)
18
p.15
BUSOUT[1-4]
CBUS[1-4]
Selector
IC108
(16p)
BUSOUT[5-8]
CBUS[5-8]
IC109
(16p)
p.21
2ch/line x 4 (AUDIO)
4ch/line x 4 (AUDIO)
8ch/line x 4 (AUDIO)
C
19
19
Transceiver
Transceiver
Transceiver
Transceiver
Transceiver
IC052
(20p)
IC053
(20p)
IC054
(20p)
IC055
(20p)
IC056
p.14
p.14
p.14
p.14
MY slot 1
MY slot 2
MY slot 3
Transceiver
S1IN[1-8]
IC058
(20p)
p.14
S2IN[1-8]
Transceiver
S1OUT[1-8]
IC060
(20p)
p.14
S2OUT[1-8]
S3IN[1-8]
Transceiver
IC059
(20p)
p.14
S4IN[1-8]
S3OUT[1-8]
Transceiver
IC061
(20p)
p.14
S4OUT[1-8]
CN015
SUMIN[1-4]
Receiver
IC121(16p)
sum in
SUMIN[5-8]
IC120(16p)
p.24
BUSOUT[1-4]
Driver
IC119(16p)
bus out
BUSOUT[5-8]
IC118(16p)
p.24
CASINWCIN
CASWCIN
Selector
Receiver
5
CASINWCOUT
WCIN
IC026(16p)
IC039(16p)
p.10
p.12
WC
OUT1
Driver
12
Buffer
8,9
IC043(16p)
IC029(20p)
18
CFS256
p.12
p.10
DIR2
IC040(44p)
p.12
CASOUT
Driver
5
IC036(16p)
WCOUT
WC
p.11
OUT2
CASOUT
WCIN
BUSIN[1-4]
Receiver
ATSC x2
IC033(16p)
bus in
IC038
(80p)
BUSIN[5-8]
IC032(16p)
IC042
(80p)
p.12
p.11
SUMOUT[1-4]
Driver
IC035(16p)
sum out
SUMOUT[5-8]
IC034(16p)
p.11
BLOCK DIAGRAM 003 (AFC1)
B
A
AFC1
/RESET[2]
MYTX,MYRX
2
6
12
7
Transceiver
(20p)
IC057
(20p)
p.14
p.14
MY slot 4
DIAGOUT
WCKIN
WCSEL[0-2]
CONTROL
CASIN
TX
TX
Driver
RX
Receiver
RX
IC122(16p)
p.24
CASIN_ID
JK002
WORD CLOCK IN
WORD CLOCK OUT
JK003
/LOCK (LOCKN)
/CASLOCK
CN009
CASOUT_ID
CONTROL
CASOUT
TX
TX
Driver
RX
Receiver
RX
IC037(16p)
p.11
BUSOSEL
DSP Section
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