Epson S1C17624 Technical Manual page 141

12 16-BiT PWM TiMeR (T16e)
T16e Ch.x Control Register (T16e_CTlx)
Register name address Bit
T16e Ch.x 0x5306 D15–9 –
Control Register
(16 bits)
D8
(T16e_CTlx)
D7
D6
D5
D4
D3
D2
D1
D0
D[15:9] Reserved
D8 iniTOl: initial Output level Bit
Sets the initial timer output level.
1 (R/W): TOUTx = High, TOUTNx = Low
0 (R/W): TOUTx = Low, TOUTNx = High (default)
The timer output pin switches to the initial output level set here when the clock output is switched off
by writing 0 to OUTEN. Note that this level will be inverted when INVOUT is 1.
D7 Reserved
D6 SelFM: Fine Mode Select Bit
Sets the clock output to fine mode.
1 (R/W): Fine mode
0 (R/W): Normal output (default)
When SELFM is set to 1, the clock output is set to fine mode, and the output clock duty becomes ad-
justable in count clock half-cycle steps. When SELFM is set to 0, normal clock output is performed.
D5 CBuFen: Comparison Buffer enable Bit
Enables or disables writing to the compare data buffer.
1 (R/W): Enabled
0 (R/W): Disabled (default)
When CBUFEN is set to 1, compare data is read and written via the compare data buffer. The buffer
contents are loaded into the compare data register when the counter is reset via software or by the com-
pare B signal.
When CBUFEN is set to 0, compare data is read and written directly from/to the compare data register.
D4 inVOuT: inverse Output Bit
Selects the timer output signal polarity.
1 (R/W): Inverted (TOUTx = active low, TOUTNx = active high)
0 (R/W): Normal (TOUTx = active high, TOUTNx = active low) (default)
Writing 1 to INVOUT generates an active low signal (off level = high) for the TOUTx output. When
INVOUT is 0, an active high signal (off level = low) is generated.
Writing 1 to this bit also inverts the initial output level set by INITOL.
The signal level above is inverted for the TOUTNx output.
D3 ClKSel: input Clock Select Bit
Selects the timer input clock.
1 (R/W): External clock
0 (R/W): Internal clock (default)
Writing 0 to CLKSEL selects the internal clock (PCLK) for the timer input clock, while writing 1
selects an external clock (a clock input via the EXCLx pin) and it functions as an event counter.
To input an external clock/pulse to T16E, the I/O port shared with an EXCLx input must be set to input
mode.
12-8
name Function
reserved
iniTOl
Initial output level
–
reserved
SelFM
Fine mode select
CBuFen
Comparison buffer enable
inVOuT
Inverse output
ClKSel
Input clock select
OuTen Clock output enable
T16eRST
Timer reset
T16eRun Timer run/stop control
Seiko epson Corporation
Setting init. R/W
–
1 High 0 Low
–
1 Fine mode 0 Normal mode
1 Enable 0 Disable
1 Invert 0 Normal
1 External 0 Internal
1 Enable 0 Disable
1 Reset 0 Ignored
1 Run 0 Stop
S1C17624/604/622/602/621 TeChniCal Manual
Remarks
– – 0 when being read.
0 R/W
– – 0 when being read.
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 W 0 when being read.
0 R/W