JVC 330 Service Manual page 35

I
I
I
I DC Restore Delay
I Internal Sync Forced
I Correction Start Delay
I Pincushion Start Delay
2H Sync Enable
I
Shifted Sync Enable
I
/External Sync Detect
O
O
O
O
Raster Timing Generator I/O
This section provides a description of the inputs to and outputs from the RTG. The I/O
description are arranged by the source/destination of the signal and so the assemblies
communicated with are used as the primary heading of each group of signals and then are
further subdivided into inputs and outputs. In each case, the signal's direction is noted,
with input referring to an input to the RTG, and output to an output from the RTG. (e.g.:
under System Controller Board "Input"; SYSCLK refers to the signal SYSCLK that is an
input to the RTG from the System Controller Board). When test points are provided for
the I/O they are noted.
Table 2-5 Raster Timing Generator I/O Signals
Inputs
SYSCLK
IICCLK
Outputs
/IICINT
/Hx224
Model 330, 340SC and 370SC Service Manual
T Blank
B Blank
/STBP
HCount
/Phase Lock
Phase Count
System Controller Board
Description
4 MHz clock signal for derivation of internal HDTV sync signal.
(TP 13)
IIC clock line. Unidirectional clock line for control of
synchronous data transfer over IIC data bus.
Description
IIC interrupt line. Signal line for slave boards to inform the SCB
(master) that there is data to be transferred. Master then polls
slaves to determine the source of the interrupt.
Square wave signal 224 X the horizontal frequency for overlay
address generator clocking. (TP 23)
Chapter 2—Functional Description
Commanded position of top blanking.
Commanded position of bottom blanking.
Command for DC restore timing on either
leading or trailing edge of sync pulse.
Commanded timing of DC restore after
reference edge of sync pulse.
Command to force internal sync select.
Commanded H phase of correction map.
Commanded H phase of pincushion, keystone,
and linearity correction.
Command determines path of H sync signal.
Command determines path of H sync signal.
Is an external sync available.
Count of H lines per frame.
Indication of PLL lock.
Indication of phase difference between
HSYNC and HFlyback.
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