Table of Contents
Advertisement
IC BLOCK DIAGRAM & DESCRIPTION
IC597 TDA8921TH (Class-D Power Amplifier)
3
10
IN1-
9
INPUT
STAGE
IN1+
8
mute
11
SGND1
7
OSC
OSCILLATOR
6
MODE
MODE
SGND2
2
mute
5
IN2+
INPUT
STAGE
IN2-
4
1
12
V
2
V
1
SSA
SSA
SYMBOL PIN
VSSA2
1
negative analog supply voltage for channel 2
SGND2
2
signal ground for channel 2
VDDA2
3
positive analog supply voltage for channel 2
IN2-
4
negative audio channel 2 input
IN2+
5
positive audio channel 2 input
MODE
6
mode select input : (standby, mute or operationg)
OSC
7
oscillator frequency adjustment or tracking input
IN1+
8
positive audio channel 1 input
IN1-
9
negative audio channel 1 input
VDDA1
10
positive analog supply voltage for channel 1
SGND1
11
signal ground for channel 1
VSSA1
12
negative analog supply voltage for channel 1
IC651 TMP87EP26F-4K76 (Micro Controller)
Control Pin
I/O
Resonator connecting pins (high-frequency)
XIN
Input
Rf=1.2MΩ (typ.)
XOUT
Output
Ro=1.5kΩ (typ.)
R=1kΩ (typ.)
Resonator connecting pins (low-frequency)
XTIN
Input
Rf=6MΩ (typ.)
XTOUT
Output
Ro=220kΩ (typ.)
R=1kΩ (typ.)
Sink open drain output. Hysteresis input.
Pull-up resistor.
RESET
I/O
R
=220kΩ (typ.)
IN
R=1kΩ (typ.)
Hysteresis input.
STOP/INTS
Input
R=1kΩ (typ.)
Pull-down resistor.
TEST
Input
R
=70kΩ (typ.)
IN
BOOT
R=1kΩ (typ.)
P0
Tri-state I/O.
I/O
P5
R=1kΩ (typ.)
Tri-state I/O. Hysteresis input.
P1
I/O
R=1kΩ (typ.)
Sink open drain output. Hysteresis input.
P3
I/O
R=1kΩ (typ.)
Sink open drain output.
P2
I/O
R=1kΩ (typ.)
P6
Sink open drain
P7
or
I/O
P8
Segment output.
P9
R=1kΩ (typ.)
Sink open drain or push-pull output.
P4
I/O
P41 High current output. Hysteresis input.
Sink open drain output.
PD
I/O
R=1kΩ (typ.)
All manuals and user guides at all-guides.com
18
13
RELEASE1
PWM
MODULATOR
SWITCH1
HANDSHAKE
ENABLE1
STABI
TEMPERATURE SENSOR
MANAGER
CURRENT PROTECTION
ENABLE2
PWM
SWITCH2
HANDSHAKE
MODULATOR
RELEASE2
24
19
V
HW
SSD
DESCRIPTION
Remarks
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
VLC
PD0
PD1
PD2
VDD
23
14
DRIVER
HIGH
CONTROL
AND
DRIVER
LOW
V
1
SSP
V
2
SSP
DRIVER
HIGH
CONTROL
AND
DRIVER
LOW
17
20
V
1
V
2
SSP
SSP
SYMBOL PIN
PROT
13
time constant capacitor for protection delay
VDDP1
14
positive power supply voltage for channel 1
BOOT1
15
bootstrap capacitor for channel 1
OUT1
16
channel 1 PWM output
VSSP1
17
negative power supply voltage for channel 1
STABI
18
decouping capacitor of internal stabilizer for logic supply
HW
19
handle wafer ; must be connected to VSSD
VSSP2
20
negative power supply voltage for channel 2
OUT2
21
channel 2 PWM output
BOOT2
22
bootstrap capacitor for channel 2
VDDP2
23
positive power supply voltage for channel 2
VSSD
24
negative digital supply voltage
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
- 17 -
15
BOOT1
V
24
SSD
16
OUT1
23
V
2
DDP
BOOT2
22
OUT2
21
20
V
2
SSP
HW
19
TDA8921TH
STABI
18
22
BOOT2
17
V
1
SSP
16
OUT1
21
15
OUT2
BOOT1
14
V
1
DDP
PROT
13
DESCRIPTION
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
1
V
2
SSA
2
SGND2
V
2
3
DDA
4
IN2-
5
IN2+
6
MODE
7
OSC
8
IN1+
9
IN1-
10
V
1
DDA
11
SGND1
12
V
1
SSA
VSS
BOOT
VAREF
P57(AIN7)
P56(AIN6)
P55(AIN5)
P54(AIN4)
P53(AIN3)
P52(AIN2)
P51(AIN1)
P50(AIN0)
P36
P35
P34
P33
P32
P31
P30
P17
P16
Advertisement
Table of Contents
