Table of Contents
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Pin
Port
No.
39
-
40 DVSS2 GND
41 CLK C
AUDIO bit clock input
M
42 SCK
Clock input
43 LRCK
AUDIO L/R identifying
C M
signal input
44 CDFS
Serial frame sink signal
input
45 DATA
AUDIO serial data input
CM
46
-
47 SI
Serial data input
48 CLK M
AUDIO bit clock output
C
49 SCK
Clock input
50 CVSS6 GND
51
-
52 CVDD3 CORE CPU system (1.6V)
power supply
53 LRCK
AUDIO L/R identifying
M C
signal output
54 CDFS
Serial frame sink signal
input
55
-
56 DVDD3 I/O system (3.3V) power
supply
57 DVSS3 GND
58 REST
Mechanics deck REST SW
SW
input
59 DATA
AUDIO serial data output
M C
60 SO
Serial data output
61
-
62
-
63 /NMI
64 /INT0
65 /INT1
66 BLKCK Subcode block clock pulse
input
67 /INT3
68 CV
CORE CPU system (1.6V)
DD4
power supply
69 SW1
Mechanics deck SW1 input
70 CVSS7 GND
71 MCLK
Clock output (To Servo
DSP)
72 DVSS4 GND
Descriptions
-
-
-
-
-
-
-
-
-
-
I/O
(V)
-
-
-
0
I
1.6
I
3.3
I
1.6
I
2.6
I
1.6
-
-
I
0
O
1.6
I
3.3
-
0
-
-
-
1.6
O
1.6
I
2.4
-
-
-
3.3
-
0
I
3.3
O
1.6
O
1.2
-
-
-
-
-
3.3
-
3.3
-
3.3
I
0
-
3.3
-
1.6
I
0
-
0
O
3.3
-
0
10
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