Cypress PSoC 64 Secure Boot Manual
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Cypress PSoC 64 Secure Boot Manual

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  • Page 1 Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio.
  • Page 2 CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit Guide Doc. # 002-29505 Rev. *B Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 www.cypress.com...
  • Page 3 High-Risk Device, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any use of a Cypress product as a Critical Component in a High-Risk Device.

  • Page 4: Table Of Contents

    Contents Safety and Regulatory Compliance Information 1. Introduction Kit Contents .........................6 Getting Started......................7 Code Examples ......................7 Board Details .......................7 Additional Learning Resources..................10 Technical Support......................10 Documentation Conventions..................11 Acronyms........................11 2. Software Installation Before You Begin.......................13 Install Software ......................13 3. Kit Operation Theory of Operation....................15 KitProg3 ........................19 3.2.1 Programming and Debugging ................19 3.2.2 USB-UART Bridge..................19...
  • Page 5 Contents 5.2.9 System Crystals .....................42 5.2.10 10-pin SWD/JTAG Programming Header ............42 Bill of Materials ......................42 Frequently Asked Questions..................43 Revision History CY8CPROTO-064B0S3 PSoC 64 "Secure Boot" Prototyping Kit Guide, Doc. # 002-29505 Rev. *B...

  • Page 6: Safety And Regulatory Compliance Information

    General Safety Instructions ESD Protection ESD can damage boards and associated components. Cypress recommends that you perform procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD protection by wearing an anti-static wrist strap attached to a grounded metal object.

  • Page 7: Introduction

    Once the kit is provisioned with a specific set of keys/policies, it will be bound to them unless re- provisioned. The 3 boards give you the flexibility to experiment with different policies or keys. Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office for help: www.cypress.com/support.

  • Page 8: Getting Started

    Introduction Getting Started This guide will help you to get acquainted with the CY8CPROTO-064B0S3 “Secure Boot” Prototyping Kit: Software Installation chapter on page 13 describes the installation of the kit software. This ■ includes ModusToolbox software which will be used to develop, program and debug applications on to the device.
  • Page 9 Introduction Figure 1-1 shows the pinout of the PSoC 64 “Secure Boot” Prototyping Board. Figure 1-1. Prototyping Board Pinout KitProg3 KitProg3 USB connector (J8) PSoC 64 SWD/JTAG programming headers (J7,J5) PSoC 64 section P6_VDD P7_0 P2_0 P7_1 P2_1 P7_2 P2_2 P7_3 P2_3 P0_2...
  • Page 10 Introduction Table 1-1. Board Pinout Header Primary On-board Secondary On-board PSoC 64 Pin Connection details Mapping Function Function P0[0] – WCO_IN – – P0[1] – WCO_OUT – – P0[2] J2.15 GPIO – – P0[3] J2.14 GPIO – – P0[4] J1.4 User Button (SW2) GPIO Connected to ground as active...

  • Page 11: Additional Learning Resources

    – – USB D– Additional Learning Resources Cypress provides a wealth of data at www.cypress.com/psoc64 to help you to select the right PSoC device for your design and to help you to quickly and effectively integrate the device into your design.

  • Page 12: Documentation Conventions

    Introduction Documentation Conventions Table 1-2. Document Conventions for Guides Convention Usage Displays file locations, user entered text, and source code: Courier New C:\...cd\icc\ Italics Displays file names and reference documentation: Read about the sourcefile.hex file in the PSoC Creator User Guide. [Bracketed, Bold] Displays keyboard commands in procedures:...
  • Page 13 Introduction Table 1-3. Acronyms Used in this Document (continued) Acronym Definition Java Web Token Low Dropout Regulator Light-emitting Diode Micro-Controller Unit Original Equipment Manufacturer Personal Computer Peripheral Driver Library PSoC Programmable System-on-Chip Pulse Width Modulation QSPI Quad Serial Peripheral Interface Root of Trust RTOS Real Time Operating System...

  • Page 14: Software Installation

    Before You Begin To install Cypress software, you will require administrator privileges. However, they are not required to run the software once it has been installed. Before you install the kit software, close any other Cypress software that is currently running.
  • Page 15 Software Installation  macOS: By default, ‘python’ points to /usr/bin/python which is python2. To make 'python' and 'pip' resolve to python3 versions, execute the following: echo 'alias python=python3' >> ~/.bash_profile echo 'alias pip=pip3' >> ~/.bash_profile source ~/.bash_profile  Make sure that you have the latest version of pip installed, use the following command. python -m pip install --upgrade pip ...

  • Page 16: Kit Operation

    Kit Operation This chapter introduces you to various features of the CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit, including the theory of operation and the onboard KitProg3 programming and debugging functionality, USB-UART and USB-I2C bridges. Theory of Operation The CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit is built around the PSoC 64 chip.
  • Page 17 Kit Operation Figure 3-2. Block Diagram of Prototyping Board sd Z' sh^ W^  h^ D >K > <W sh^ < W h^ D E > < W W^  sd Z' W^  h^ D > <W sh^ sd Z' sd Z' > W s...
  • Page 18 I2C interface of the KitProg3. This is used to program and debug the PSoC 64 device. If the KitProg3 section is broken away, it can be used to program any supported Cypress device over the 5-pin SWD interface. Note that VTARG is an input to KitProg3, and therefore the target must be powered externally.
  • Page 19 7. PSoC 64 reset button (SW1): This button is used to reset the PSoC 64 device. This button connects the PSoC 64 reset (XRES) pin to ground when pressed. 8. Cypress 512-Mbit Semper NOR flash memory (S25HL512T, U6): An S25HL512TFABHI010 NOR flash of 512-Mbit capacity is connected to the serial memory interface (SMIF) of the PSoC 64 device.

  • Page 20: Kitprog3

    KitProg3. KitProg3 also has USB-UART and USB-I2C functionality. KitProg3 supports CMSIS-DAP Bulk mode and DAPLink mode for programming the target MCU using SWD. A Cypress PSoC 5LP device is used to implement KitProg3 functionality. For more details on the KitProg3 functionality, see the KitProg3 User Guide.

  • Page 21: Usb-I2C Bridge

    Kit Operation 3.2.3 USB-I2C Bridge The KitProg3 can function as a USB-I2C bridge and communicate with the Bridge Control Panel (BCP) software which acts as an I2C master. The I2C lines on the PSoC 64 chip are hard-wired on the board to the I2C lines of the KitProg3, with onboard pull-up resistors as Figure 3-5 shows.

  • Page 22: Running Code On Psoc 64 "Secure Boot" Mcus

    “Secure Boot” SDK rot_auth.JWT prov_auth.JWT Modify device policies Send prov_cmt.JWT from template if needed Boot&Upgrade Policy Hex file and certificate “Cypress Bootloader” Debug Policy provided by “Secure Boot” SDK Device validates packet Bootloader Cert for signatures, accepts assets Sign with development...
  • Page 23 For evaluation purposes, the “Secure Boot” SDK provides the following assets to easily provision your device: 1. A development Cypress Authorization JWT token (cy_auth); this authorizes a development HSM keypair which is used by your PC to provision the chip.

  • Page 24: Create Modustoolbox Example Application

    Running Code on PSoC 64 “Secure Boot” MCUs Create ModusToolbox example application Now that an overview of the provisioning process has been provided, the steps to create an application, provision the device, and then build, program, run the application will be shown in detail. 1.
  • Page 25 Running Code on PSoC 64 “Secure Boot” MCUs 3. Select the “Secure Blinky LED FreeRTOS” example and click Create to create the application. Figure 4-5. Secure Blinky LED FreeRTOS Example Selection CY8CPROTO-064B0S3 PSoC 64 "Secure Boot" Prototyping Kit Guide, Doc. # 002-29505 Rev. *B...

  • Page 26: Provision The Device

    Running Code on PSoC 64 “Secure Boot” MCUs Provision the Device 1. Navigate to your ModusToolbox application directory folder in a command-line program: For Windows users, use the command line program “modus-shell” instead of a standard Windows command line application. Modus shell provides access to all ModusToolbox tools including “CySecureTools”...
  • Page 27 Running Code on PSoC 64 “Secure Boot” MCUs 3. Create new keys. What does this step do? “CySecureTools” reads the provided policy and generates the keys defined. Depending on the policy chosen, there can be multiple keys generated under the “keys” folder. By default only one key, the USERAPP_CM4_KEY, a P-256 Elliptic curve key-pair is generated.
  • Page 28 ■ Verify that User flash is empty and no code is running before any provisioning takes place. Failing the entrance exam returns an error in the command line. If there is any firmware running on the device, existing firmware can be erased using the tools like Cypress Programmer.
  • Page 29 Running Code on PSoC 64 “Secure Boot” MCUs Note: The entrance exam can be run separately without provisioning to verify the lifecycle stage of a device by using the following command: cysecuretools --target cyb06xx5 --policy ./policy/ policy_single_CM0_CM4.json entrance-exam Note: In case you have a kit which has already been provisioned in the past with different credentials, you can re-provision the chip with new keys &...

  • Page 30: Build And Program The Example Application

    Running Code on PSoC 64 “Secure Boot” MCUs Build and Program the Example Application 1. From the Eclipse IDE, click on the “Build Secure_Blinky_LED_FreeRTOS Application” link in the Quick Panel. Figure 4-8. Build Secure_Blinky_LED_FreeRTOS Application Selection Note: Ensure that you have clicked the application in the explorer otherwise the option will not be visible.
  • Page 31 Running Code on PSoC 64 “Secure Boot” MCUs 3. The KitProg3 will still be in DAPLink mode from the provisioning step. It will need to be changed to CMSIS-DAP Bulk mode to program or debug the project. To switch to CMSIS-DAP Bulk mode, press and release the mode switch (SW3) on the kit until the status LED (LED2) is constantly on (not ramping).

  • Page 32: Additional Code Examples

    Running Code on PSoC 64 “Secure Boot” MCUs Additional Code Examples Additional code examples for PSoC 64 device can be found on the Cypress git repository https://github.com/cypresssemiconductorco Note that most PSoC 6 MCU code examples will run on PSoC 64 devices. If you wish to run other code examples on the existing kit, you can follow the same steps outlined in Section 4.2 to 4.4 with...

  • Page 33: Hardware

    Hardware Schematics Refer to the schematic files available on the webpage. Hardware Functional Description This section explains in detail the individual hardware blocks of the PSoC 64 “Secure Boot” Prototyping Board. 5.2.1 CYB06445LQI-S3D42 (U1) The PSoC 64 microcontroller is a high-performance, ultra-low-power and secured MCU platform, purpose-built for IoT applications.

  • Page 34: Psoc 5Lp Based Kitprog3 (U2)

    Hardware 5.2.2 PSoC 5LP based KitProg3 (U2) An onboard PSoC 5LP (CY8C5868LTI-LP039) device is used as KitProg3 to program and debug the PSoC 64 device. The PSoC 5LP device connects to the USB port of the PC through a USB connector and to the SWD and other communication interfaces of the PSoC 64 device.

  • Page 35: Serial Interconnection Between Psoc 5Lp And Psoc 64 Device

    Hardware 5.2.3 Serial Interconnection between PSoC 5LP and PSoC 64 Device In addition of its use as an onboard programmer, the PSoC 5LP device functions as an interface for the USB-UART and USB-I2C bridges, as shown in Figure 5-3. The USB-Serial pins of the PSoC 5LP device are hard-wired to the I2C/UART pins of the PSoC 64 chip.

  • Page 36: Power Supply System

    Hardware 5.2.4 Power Supply System The power supply system on this board is versatile, allowing the input supply to come from the following sources: 5 V from the onboard USB Micro-B connectors (J4 and J8) ■ 5 V from external power supply through VIN header J2.20 ■...
  • Page 37 Hardware 5.2.4.1 Measure PSoC 64 Device Current Consumption To measure the PSoC 64 current, follow these steps: 1. Remove the zero-ohm resistor R21 and install a 2-pin header at J6. 2. Connect an ammeter across the 2-pin header J6. This method can be used with KitProg3 USB (J8), VIN or with the power supplied to one of the VTARG pins (J5.1 or J7.1), but NOT when supplying power to one of the P6.VDD pins (J1.20) or when powered through PSoC 64 USB (J4).

  • Page 38: Expansion Connectors

    Hardware 5.2.5 Expansion Connectors 5.2.5.1 Functionality of the J1 and J2 Headers (Target Board) The target PSoC 64 section contains two single inline headers (J1 and J2). These 1×21-pin headers have 0.1-inch spacing and include a subset of the GPIOs available on the PSoC 64 device. Figure 5-6.
  • Page 39 Hardware Table 5-1. Pin Details of J1 and J2 Headers PSoC 64 “Secure Boot” Prototyping Board PSoC 64 “Secure Boot” Prototyping Board GPIO Header (J2) GPIO Header (J1) Signal Description Signal Description J2_01 VDDUSB USB Power J1_01 VBACKUP* Backup Power J2_02 Ground J1_02...
  • Page 40 Hardware 5.2.5.2 Functionality of J7 and J5 Headers (KitProg3 to PSoC 64 Device) The KitProg3 and target sections of the board each contain a 2 × 5-pin header. These headers provide a physical connection between the two devices. This connection contains the following signals: 1.

  • Page 41: Quad Spi Flash

    5.2.6 Quad SPI Flash The board has a Cypress Semper NOR flash memory (S25HL512TFABHI010) of 512-Mbit capacity. The NOR Flash is connected to the serial memory interface (SMIF) of the PSoC 64 device. The NOR Flash device can be used for both data and code memory with execute-in-place (XIP) support and encryption.

  • Page 42: User Buttons

    Hardware 5.2.8 User Buttons The target PSoC 64 board contains a user button (SW2) connected to the P0[4] pin on the PSoC 64 chip. This button can be used for general user inputs or for wakeup during Hibernate mode. The board has a reset button and mode select button. The reset button (SW1) is connected to the XRES pin of the PSoC 64 device and is used to reset the device.

  • Page 43: System Crystals

    Hardware 5.2.9 System Crystals Two different crystal oscillator inputs are available on the board. The WCO kHz crystal (32.768 kHz) is populated and is used for timing. A footprint for the ECO MHz crystal and load capacitors are on the board so that you can easily select the crystal of your choice. The ECO is optional and only required when the internal clock must be more accurate than the internal main oscillator (IMO).

  • Page 44: Frequently Asked Questions

    KitProg3 User Guide. 5. Does the kit get powered when I power the kit from another Cypress kit through the J2.20 header? Yes, the VIN pin on the J2.20 header is the supply input/output pin and can take up to 5.5 V.

  • Page 45: Revision History

    Revision History Document Revision History Document Title: CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit Guide Document Number: 002-29505 Revision ECN Number Issue Date Description of Change 6778499 10/09/2020 New kit guide. 7040748 12/10/2020 Updated Software Installation chapter on page Updated “Install Software”...
  • Page 46 Revision History Document Revision History (continued) Document Title: CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit Guide Document Number: 002-29505 Revision ECN Number Issue Date Description of Change *B (cont.) 7062683 04/23/2021 Updated Software Installation chapter on page Updated description. Updated “Install Software”...
  • Page 47 Revision History Document Revision History (continued) Document Title: CY8CPROTO-064B0S3 PSoC 64 “Secure Boot” Prototyping Kit Guide Document Number: 002-29505 Revision ECN Number Issue Date Description of Change *B (cont.) 7062683 04/23/2021 Updated Hardware chapter on page Updated “Hardware Functional Description” on page Updated “CYB06445LQI-S3D42 (U1)”...

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