1265 (RH-103)
Baseband Description and Troubleshooting
SBI CLK Interface
A 9.6 MHz clock signal is used for DBUS, which is used by the MSM to transfer data
between the PM and MSM.
The system clock is stopped during sleep mode by disabling the VREG_TCXO.
The TCXO is turned off by the PM regulator, which is from MSM's TCXO_EN output
signal.
Flash Programming Error Description
This table describes the errors condition during Flash memory downloading to the
mobile terminal.
Description
Packet Checksum fail
Erase fail
Write fail
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© 2007 Nokia Corporation
Figure 9: MSM to PM SBI Timing at 25
Not Working Properly
ERR: CRC invalid
Unable to erase device
Write unsuccessfully
Figure 10: Flash Programming Error Description
0
C
P
P
Company Confidential
Issue 1 04/2007