Table of Contents
Advertisement
7
Oscillation Circuit and Clock Control
7.1
Oscillation Circuit
7.1.1
Configuration of Oscillation Circuit
The S1C63003/004/008/016 is configured as a twin clock system with two internal oscillation circuits (OSC1 and
OSC3). The OSC1 oscillation circuit generates the main-clock (Typ. 32.768 kHz) for low-power operation and the
OSC3 oscillation circuit generates the sub-clock (Typ. 4.0 MHz/3 V normal type or 1.0 MHz/1.5 V low-voltage type)
to run the CPU and some peripheral circuits in high speed. Figure 7.1.1.1 shows the configuration of the oscillation
circuit.
SLEEP
status
At initial reset, OSC1 oscillation circuit is selected as the CPU operating clock source. The S1C63003/004/008/016
allows the software to turn the OSC3 oscillation circuit on and off, and to switch the system clock between OSC3 and
OSC1. The OSC3 oscillation circuit is used when the CPU and some peripheral circuits need high speed operation.
Otherwise, use the OSC1 oscillation circuit to generate the operating clock and stop the OSC3 oscillation circuit to
reduce current consumption.
7.1.2
Mask Option
In the S1C63004/008/016, the OSC3 oscillator type can be selected from ceramic, CR (external R) and CR (built-in
R). The S1C63003 OSC3 oscillator type is fixed at CR oscillation (built-in R).
7.1.3
OSC1 Oscillation Circuit
The OSC1 oscillation circuit (crystal oscillation circuit) generates the 32.768 kHz (Typ.) system clock which is used
during low speed (low power) operation of the CPU and peripheral circuits. Furthermore, even when OSC3 is used
as the system clock, OSC1 continues to generate the source clock for the clock timer and stopwatch timer. This oscil-
lation circuit stops when the SLP instruction is executed.
Figure 7.1.3.1 shows the configuration of the OSC1 oscillation circuit.
A crystal oscillation circuit can be configured simply by connecting a crystal resonator X'tal (Typ. 32.768 kHz)
between the OSC1 and OSC2 terminals along with a trimmer capacitor C
and V
.
SS
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
OSC1
(f
)
OSC1
oscillation circuit
OSC3
oscillation circuit
(f
)
OSC3
Oscillation circuit
control signal
OSCC
Figure 7.
1.1.1 Oscillation circuit block diagram
OSC1
C
G1
X'tal
OSC2
V
SS
Figure 7.
1.3.1 OSC1 oscillation circuit
Seiko epson Corporation
7 OSCillaTiOn CiRCuiT anD ClOCK COnTROl
To peripheral
Prescaler
circuits
Clock
To CPU
switch
To some peripheral
circuits
CPU clock
selection signal
CLKCHG
SLEEP status
f
OSC1
V
SS
(0–25 pF) between the OSC1 terminal
G1
7-1
Advertisement
Table of Contents
