Emmc Flash Programming; Qspi Flash Programming Via Jtag; Qspi Flash Programming From An External Spi Master; Sd Card Boot Modes - Enclustra Mercury XU5 User Manual

BOOT_MODE1 BOOT_MODE0
0 1
1 1
Table 39: SD Card Boot Modes
For the SD card boot mode, the following requirements must be met:
The SD card must be connected to MIO pins 45-51
A Zynq boot image must be generated from an MPSoC design having the SDIO controller enabled
The boot image must be named "boot.bin" and then copied to the SD card
The SDIO controller must be fed with a reasonable clock frequency. Please refer to the reference
design for guidelines on SDIO settings.
For details on SD card boot, please refer to the Zynq UltraScale+ MPSoC Technical Reference Manual [19].
3.9

eMMC Flash Programming

The eMMC flash can be formatted and/or programmed in u-boot or Linux, like a regular SD card. The boot
image or independent partition files can be transmitted via Ethernet or copied from another storage device.
Certain Xilinx tool versions support eMMC flash programming via JTAG.
3.10

QSPI Flash Programming via JTAG

The Xilinx Vivado and SDK software offer QSPI flash programming support via JTAG.
Certain Xilinx tools versions support QSPI flash programming via JTAG only when JTAG boot mode is used
(unavailable on the Mercury XU5 SoC module). For more information, please refer to the Xilinx documen-
tation [19] and support. Alternatively, the QSPI flash can be programmed in u-boot or Linux by the SPI
controller in the PS or from an SPI external master.
3.11

QSPI Flash Programming from an External SPI Master

The signals of the QSPI flash are directly connected to the module connector for flash access. As the flash
signals are connected to the MPSoC device as well, the MPSoC device pins must be tri-stated while access-
ing the QSPI flash directly from an external device.
This is ensured by pulling the PS_SRST# signal to GND followed by a pulse on PS_POR#, which puts the
MPSoC device into reset state and tri-states all I/O pins. PS_SRST# must be low when PS_POR# is released
and kept low until the flash programming has finished. Afterwards, all SPI lines and PS_SRST# must be
tri-stated and another reset impulse must be applied to PS_POR#.
Figure 18 shows the signal diagrams corresponding to flash programming from an external master.
In addition, a non-QSPI boot mode must be used during QSPI flash programming, otherwise the MPSoC
device will attempt to boot from the flash and will disturb the clock.
D-0000-445-001
Description
Boot from SD card (with an external SD 3.0
compliant level shifter; currently not sup-
ported)
Boot from SD card (default mode)
53 / 64
VCC_CFG_MIO
1.8 V
Refer to Section 2.9.5
Version 07, 25.07.2019