Assertion And Deassertion Of The Dma Request Signal; 14.4 Programming Model - Texas Instruments CC3235 SimpleLink Series Technical Reference Manual

Programming Model
Figure 14-8. Assertion and Deassertion of the DMA Request Signal

14.4 Programming Model

This section describes the programming model of the camera core module.
14.4.1 Camera Core Reset
The camera core module can accept a general software reset, propagated through all the hierarchy. This
reset can initialize the module, and has the same effect as the hardware reset.
1. Set the CC_SYSCONFIG.SOFTRESET bit to 1.
2. Read CC_SYSSTATUS.RESETDONE to check if it is 1, indicating that the reset took place.
If after five reads, CC_SYSSTATUS.RESETDONE still returns 0, assume that an error occurred during the
reset stage.
The programmer should not set the CC_SYSCONFIG.SOFTRESET bit to 1 if the camera core module is
integrated in a subsystem; it is safer to use the software reset at subsystem level.
14.4.2 Enable the Picture Acquisition
The camera core module must be set by using the following programming model:
1. Configure the interrupt generation as required, using the CC_IRQSTATUS and CC_IRQENABLE
registers (most common are overflow and underflow interrupts).
2. CC_CTRL_DMA.FIFO_THRESHOLD must be set to a specific value (depending on the DMA module),
and CC_CTRL_DMA.DMA_EN must be set to 1 for normal use of the module.
3. Configure the CC_CTRL_XCLK.
4. Enable the picture acquisition using the CC_CTRL. TI recommends setting CC_FRAME_TRIG and
NOBT_SYNCHRO to 1 when CC_EN is set to 1, to start the acquisition. If software only acquires one
frame acquisition, use the CC_ONE_SHOT register bit (in this case, the module is automatically
disabled at the end of the frame).
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Parallel Camera Interface Module
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SWRU543 – January 2019
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