Download Print this page

MPS MP5515 User Manual page 18

High-efficiency bidirectional, power back-up manager
Hide thumbs Also See for MP5515:

Advertisement

Refer to the ICH bits register description on
page 31 for other boost peak settings with ICH
floating.
The MP5515 applies an over-voltage protection
(OVP) function for V
voltage of V
on FBS is over 1.1 x V
STRG
the MP5515 shuts down the LS-FET of the
boost converter until V
regulating voltage. It is not necessary to add an
external power to STRG with a voltage higher
than the V
regulation voltage.
STRG
Power-Down Release
After the first start-up period and the boost
starts switching, the MP5515 registers and
enables the release function. Once the input
power drops and DET drops to 0.99 x V
the storage boost converter stops charging and
works in buck-release mode. At the same time,
the ISOFET shuts down to prevent a negative
current from VB to VIN.
In buck mode, the MP5515 transfers energy
from the high-voltage storage capacitor to the
low-voltage bus capacitor. The regulated bus
voltage is determined by V
resistor divider from VB to FBB.
Figure 4 shows the detailed system shutdown
process. Buck mode has a max current limit
function to limit the release current. In each
buck mode switching cycle, the high-side switch
does not turn on until the inductor current drops
to a 6.5A valley current, typically.
Back up cap can supply VB
Back up
VIN
VB
Back up_regulation
PFI
Figure 4: VIN Shutdown Sequence
Input Recovery Start-Up
If the input power fails and is restored, the
MP5515 remains in buck release mode. When
STRG
is
discharged
VB_UVLO, the MP5515 restarts from the
recovered VIN power, which is a new input
power start-up cycle with TPOR delay.
MP5515 Rev. 1.02
1/18/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
MP5515 – ENERGY BACKUP AND MANAGEMENT UNIT
. If the feedback
STRG
FBS-REF
drops to the
STRG
DET-REF
and the
FBB-REF
VB_UVLO
MP5515
and
VB
drops
to
www.MonolithicPower.com
© 2018 MPS. All Rights Reserved.
Input Current Limit
The input current limit controls the input inrush
current of the ISOFET carefully to prevent an
inrush current from VIN to VB. The internal
DVDT bits or external DVDT cap can set the
soft-start time. In addition to the soft-start
,
process, ILIM can limit the steady-state current
by connecting a resistor between ILIM and
AGND to set the current limit. The current limit
can be estimated with Equation (2):
I
LIM
Where R
is the current-limit setting resistor
ILIM
from ILIM to AGND.
,
The voltage on ILIM can also monitor and
indicate the current in the ISOFET. The
relationship between the input current and ILIM
voltage can be estimated with Equation (3):
Where V
is the ILIM voltage. V
ILIM
read through an ADC converter.
The voltage on ILIM is lower than 1.09V in
normal applications. If a voltage greater than
1.5V is applied on ILIM externally, the ISOFET
is shut down, and the MP5515 enters a buck-up
process.
When the VB load is close to the ILIM threshold,
during every boost refresh cycle, the input
current may easily trigger the current limit as
well
as
the
continuously triggering ILIM interrupt in this
condition, during every boost-up refresh cycle,
the input over current-interrupt is masked
automatically. The mask time depends on the
boost-up switching time.
Once the input over-current threshold is
triggered and FBB drops to V
buck converter starts working to maintain VB.
Once FBB is charged back to 105% of V
the buck is disabled again in this condition.
During the boost refresh cycle, the buck
converter is not enabled, even if the over-
current threshold is triggered.
70
.
04
. 0
08
R
(
k
)
ILIM
ILIM
system
interrupt.
To
, the backup
FBB-REF
(2)
(3)
can be
avoid
,
FBB-REF
18

Advertisement

loading
Need help?

Need help?

Do you have a question about the MP5515 and is the answer not in the manual?

Questions and answers