J3 Pci Bus Connector - Motorola 82543 Owner's Manual

Table 3-4. J1 and J2 PCI Bus Connector Signal Definitions (Continued)
Signal
INTA*, INTB*, INTC*,
INTD*
IRDY*
LOCK*
NC
PAR
PERR*
REQ*
REQ64*
RST*
SBO*
SDONE*
SERR*
STOP*
TCK
TDI
TDO
TMS
TRDY*
TRST*
V(I/O)

J3 PCI Bus Connector

Table 3-5 on page 3-8
assignments, respectively.
associated with the connector pins.
Gigabit Ethernet/82543 PMC Installation and Use
Definition
PCI device interrupt request signal
PCI device initiator ready signal
PCI data exchange bus control line signal
No connection
Parity validation signal
PCI data and address parity error signal
PCI bus mastering request signal
64-bit transfer request signal
PCI I/O reset signal
Snoop backoff
Snoop done
PCI system error signal
PCI device data transfer stop signal
Test clock
JTAG, test data input
JTAG, test data output
TMS Test mode select
Target ready
JTAG, test reset
Voltage I/O source
identifies the 32-bit J3 PCI bus connector pin
Table 3-6 on page 3-9
J3 PCI Bus Connector
defines the signals
3-7
3