Pci Bus Latency; Table 3-3. Pci Originated Latency Matrix - Motorola MVME2400 Series Installation And Use Manual

PCI Bus Latency

The following tables list the latency of PCI originated transactions and the
bandwidth of originated transactions for five different clock ratios: 5:2,
3:2, 3:1, 2:1, and 1:1. The MVME2400 uses a 3:1 clock ratio:

Table 3-3. PCI Originated Latency Matrix

Transaction
Beat Beat
1
Burst Read 9 1
Burst Write 3 1
Single Read 9 -
Single Write 3 -
Burst Read 12 1
Burst Write 3 1
Single Read 12 -
Single Write 3 -
Burst Read 9 1
Burst Write 3 1
Single Read 9 -
Single Write 3 -
Burst Read 11 1
Burst Write 3 1
Single Read 11 -
Single Write 3 -
Burst Read 16 1
Burst Write 3 1
Single Read 16 -
Single Write 3 -
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32-bit PCI
Beat Beat
Total
2 3 4
1 1 12
1 1 6
- - 9
- - 3
1 1 15
1 1 6
- - 12
- - 3
1 1 12
1 1 6
- - 9
- - 3
1 1 14
1 1 6
- - 11
- - 3
1 1 19
1 1 6
- - 16
- - 3
64-bit PCI
Beat Beat Beat Beat
1 2 3
9 1 1 1
3 1 1 1
9 - - -
3 - - -
12 1 1 1
3 1 1 1
12 - - -
3 - - -
9 1 1 1
3 1 1 1
- - - -
- - - -
11 1 1 1
3 1 1 1
- - - -
- - - -
16 1 1 1
3 1 1 1
- - - -
- - - -
Block Diagram
Clock
Ratio
Total
4
12 5:2
6
9
3
15 3:2
6
12
3
12 3:1
6
-
-
14 2:1
6
-
-
19 1:1
6
-
-
3-7
3