Texas Instruments MSP50C6xx User Manual page 262

Mixed-signal processor
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Individual Instruction Descriptions
4.14.80 SUB
Syntax
[label]
name
SUB
SUB
SUB
SUB
SUB
SUB
SUB
Execution
[premodify AP if mod specified]
dest
dest
PC
Flags Affected
dest is An:
dest is Rx:
src1 is {adrs}:
Opcode
Instructions
SUB An[~], An, {adrs} [, next A]
SUB An[~], An[~], imm16 [, next A]
SUB An[~], An[~], PH [, next A]
SUB An[~], An, An~ [, next A]
SUB An[~], An~, An [, next A]
SUB Rx, imm16
SUB Rx, R5
Description
Subtract value of src from value of dest and store result in dest. If three
operands are specified, then subtract value of src1 from value of src (i.e.,
src-src1) and store result in dest string. Premodification of accumulator
pointers is allowed with some operand types. Note that subtraction is
performed in 2's complement and therefore the CF (carry flag) may get set
even when subtracting a smaller value from a larger value.
4-176
Subtract
dest, src, src1, [next A]]
An[~], An, {adrs} [, next A]
An[~], An[~], imm16 [, next A]
An[~], An[~], PH [, next A]
An[~], An, An~ [, next A]
An[~], An~, An [, next A]
Rx, imm16
Rx, R5
dest – src1
(for two operands)
src – src1
(for three operands)
PC + w
OF, SF, ZF, CF are set accordingly
RCF, RZF are set accordingly
TAG bit is set accordingly
16
15
14
13
12
11
0
0
0
0
~A
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
Clock, clk
Word, w
With RPT, clk
Table 4–46
2
2
1
1
1
1
1
1
2
2
1
1
10
9
8
7
6
5
next A
An
next A
An
0
1
0
next A
An
0
1
1
next A
An
0
0
1
next A
An
0
0
1
1
1
0
0
0
0
1
1
1
0
0
1
0
1
Class
Table 4–46
1a
N/R
2b
n
+3
3
R
n
+3
3
R
n
+3
3
R
N/R
4c
N/R
4d
4
3
2
1
0
adrs
0
0
1
A~
~A
0
0
0
A~
~A
0
0
0
0
~A
0
0
0
1
~A
Rx
0
0
Rx
0
0

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