Microsemi SmartFusion A2F500-DEV-KIT-2 User Manual
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Microsemi SmartFusion A2F500-DEV-KIT-2 User Manual

Microsemi SmartFusion A2F500-DEV-KIT-2 User Manual

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Summary of Contents for Microsemi SmartFusion A2F500-DEV-KIT-2

  • Page 1 SmartFusion Development Kit User’s Guide...

  • Page 2: Table Of Contents

    SmartFusion Development Kit Table of Contents Introduction ..............5 Kit Contents .
  • Page 3 Table of Contents A2F500-DEV-KIT-2 Board Stack-Up ............75 6 Manufacturing Test.

  • Page 5: Introduction

    Introduction ® The RoHS-compliant SmartFusion Development Kit (A2F500-DEV-KIT-2) enables designers to develop applications that involve one or more of the following: • Microcontroller applications • Real-time operating system (RTOS)/OS development ® • Embedded ARM Cortex™-M3 processor based systems • Motor control •...

  • Page 6: Kit Contents

    USB 2.0 A to mini-B cable Quickstart card SmartFusion Development Kit Web Resources The SmartFusion Development Kit web resources are available on the Microsemi website: www.microsemi.com/soc/products/hardware/devkits_boards/smartfusion_dev.aspx#rsc. Board Description The SmartFusion Development Kit Board is designed to provide a development platform for users to evaluate all the features of the world’s only customizable system-on-chip (cSoC) with a hard ARM...
  • Page 7 SmartFusion Development Kit Board Components. Table 2 • SmartFusion Development Kit Board Components Name Description A2F500M3G-FGG484ES Microsemi SmartFusion cSoC with hard ARM Cortex-M3 processor CURRENT SENSING Current monitoring using thumbwheel POT (RV1) PWM CIRCUIT Pulse Width Modulation Resistor Capacitor (PWMRC) circuit...
  • Page 8 PUSH-BUTTON RESET Push-button system reset for SmartFusion System MIXED_CONN100 To power-on the board mixed signal header PUSH-BUTTON Six push-button switches for test and navigation and PUB SWITCHES MIXED_CONN100 Mixed signal header A2F500_CONN100 Microsemi SmartFusion A2F500M3F-FG484ES additional I/O connector R e vi s i o n 7...

  • Page 9: Installation And Settings

    Download and install the latest release of Microsemi Libero Integrated Design Environment (IDE), v9.0 or later, from the Microsemi website and register for your free Gold license. For instructions on how to install Libero IDE and SoftConsole, refer to the...
  • Page 10 Installation and Settings Table 1-1 • Jumper Settings Jumper Function Default Setting Notes Jumper to select first 3.3 V power supply for board 1–2 Closed Jumper to select second 3.3 V power supply for board 1–2 Closed Jumper for SPI DAC output VOUT Open Jumper settings to use comparator Pins 2, 6,10 are...
  • Page 11 SmartFusion Development Kit Table 1-1 • Jumper Settings (continued) Jumper Function Default Setting Notes From AGLP125 CS289 Closed These pins are brought out for Pin 1=AGLP_3.3V_SIG1 future and testing purpose. Pin 2=AGLP_3.3V_SIG2 Pin 3=AGLP_3.3V_SIG3 Pin 4=AGLP_3.3V_SIG4 Jumper/Header for SPI, OLED, SPI flash, and loopback SPI_0 to OLED Pin 1–2 = SPI_0_OUT to OLED_SDA_IN (Need shunt pin 15–...
  • Page 12 Installation and Settings Table 1-1 • Jumper Settings (continued) Jumper Function Default Setting Notes JP18 Jumper to connect OLED_SDA_OUT and OLED_SDA_IN Pin 1–2 = Closed for I C configuration mode Closed Pin 1–2 = Open for SPI mode JP19 Jumper to select between 1.8 V and 3.3 V memory interface To keep 3.3 V connected to EMC devices tristated...
  • Page 13 SmartFusion Development Kit Table 1-2 • SmartFusion Development Kit LEDs SmartFusion Pin Comment Test LED for user application Test LED for user application Test LED for user application Test LED for user application 5 V Power Supply Indicator LED. This LED is ON when board is powered on SPEED LED: The LED is ON when device is in 100 Mbps and OFF when in 10 Mbps.
  • Page 14 Installation and Settings Testing the Hardware If the board is shipped directly from Microsemi, it contains a test program that determines whether the board works properly. If while using the board you suspect that the board is damaged, you can rerun the "Manufacturing Test"...

  • Page 15: Hardware Components

    – 100 MHz embedded RC oscillator 1% accurate – Embedded PLL with 4 output phases • High-performance FPGA fabric ® • Based on Microsemi's proven ProASIC 3 FPGA fabric • Analog front-end (AFE) • Up to three 12-Bit SAR ADCs One first-order ΣΔ...

  • Page 16: I/O Pin Connections

    Hardware Components Table 2-1 • A2F500 I/Os Device Package A2F500 FG484 Direct analog input Total analog input Total analog output 1, 2 MSS I/Os FPGA I/Os Total I/Os Notes: 1. 16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for the MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, and 3.3 V) standards.

  • Page 17: Smartfusion Csoc Hard Arm Cortex-M3 Processor

    SmartFusion Development Kit SmartFusion cSoC Hard ARM Cortex-M3 Processor The SmartFusion cSoC comes with a hard Cortex-M3 advanced processor-based MSS. The ARM Cortex-M3 microcontroller is a low power processor that features low gate count, low predictable interrupt latency, and low-cost debug. It is intended for deeply embedded applications that require fast interrupt response features.

  • Page 18: Power Sources

    Hardware Components Power Sources This board is powered through an external 5 V power supply brick. SmartFusion Power Sources Seven voltage rails (10 V, 5 V, 3.3 V, 1.8 V, 1.5 V, and ± 15 V) are provided on the board: •...

  • Page 19: Components Description And Operation

    3 – Components Description and Operation VAREF Connections The SmartFusion cSoC has one external VAREF input pin for each of the ADCs. The internal VAREF is brought out as an output, available as VAREFOUT output pin. There are multiple options available to drive the VAREF0 and VAREF1 from either external VAREF or the internal VAREF through VAREFOUT output of the FPGA fabric.

  • Page 20: Current Sensing Circuit

    Figure 3-3 Figure 3-4 on page 21 can be used with Microsemi CorePWM instantiated in the FPGA fabric to generate various voltage waveforms. These voltage waveforms can be displayed on the OLED or used via the mixed signal header. In addition, one PWM RC circuit source is routed to the AV input pin of an analog quad.

  • Page 21: Push-Button System Reset

    SmartFusion Development Kit Figure 3-3 shows the A2F500 pins driving PWM and the PWM circuit. F2-200-4-FPGAIO F2-200-5-FPGAIO F2-200-IO_6 F2-200-6-FPGAIO DGND7 F2-200-IO_7 F2-200-IO_8 F2-200-7-FPGAIO F2-200-8-FPGAIO PWM0 PWM1 F2-200 PWM0 F2-200 PWM1 DGND8 DGND9 AGND1 AGND2 DACOUT0 DACOUT1 {6} OBD0 OBD1 AGND3 AGND4 AT2 {6} AGND5...

  • Page 22: Push-Button, Dip Switches, And User Leds

    Components Description and Operation Push-Button, DIP Switches, and User LEDs Push-button switches and user LEDs can also be used for debugging and for various applications, such as gaming. V3P3 Mfr P/N :SML-512DWT86 Mfr: Rohm 1.5K 1.5K LED1_N LED_ORANGE LED_ORANGE 1.5K 1.5K LED2_N LED_ORANGE...
  • Page 23 SmartFusion Development Kit The inputs of AGLP_DIP switch are connected to pins N13,P16,R2,T2 of Bank 2 of the AGLP125 CS289. AGLP_DIP V3P3 4.7K R158 R161 4.7K R163 4.7K AGLP_3.3V_SIG1 AGLP_3.3V_SIG1 AGLP_3.3V_SIG3 AGLP_3.3V_SIG3 R164 4.7K AGLP_3.3V_SIG2 AGLP_3.3V_SIG2 AGLP_3.3V_SIG4 AGLP_3.3V_SIG4 HEADER 2X2 AGLP_3.3V_DIP1 AGLP_3.3V_DIP1 AGLP_3.3V_DIP2...

  • Page 24: One-Bit Dac (Obd) Circuit

    Components Description and Operation One-Bit DAC (OBD) Circuit For applications that require conversion from a digital to analog domain, two analog conditioning circuits are provided. This is useful in closed-loop applications. Figure 3-11 shows the circuit. Table 3-5 on page 25 Table 3-6 on page 26 show the jumper settings.

  • Page 25: Oled Display

    SmartFusion Development Kit The OBDs can also be fed into a voltage gain circuit as shown in Figure 3-11 on page 24 and described Table 3-4. In this application, the OBD sweep of 0–2.56 V can be translated to –15 V to +15 V. This is useful in closed-loop applications for ABPS channels with prescalers.
  • Page 26 Components Description and Operation Refer to the "Jumper Settings" section on page 26 for accessing the OLED from I2C0 and SPI0. V3P3 V10P V3P3 4.7uF 25V 4.7uF 25V TANT OLED_SCL {10} OLED_SDA_IN {10} OLED_SDA_OUT {10,11} TEST1 TEST2 TEST3 TEST4 TEST5 OLED_BS1 OLED_BS2 V3P3...
  • Page 27 SmartFusion Development Kit SDO_0_OUT SCLK_0_OUT SDI_0_IN SS_0_OUT {10} SPI_0_SI SPI_1_SO {9,10} OLED_SDA_OUT SPI_1_SI {10} SPI_0_SCK SPI_1_SCK OLED_CS# SPI_CS_N HDR4X4 HDR4X4 SDI_1_IN SCLK_1_OUT SDO_1_OUT SS_1_OUT Figure 3-13 • JP8 Jumper Details SPI Configuration –1 SPI Port 0 OLED SPI Port 1 SPI Flash OLED Display...

  • Page 28: Spi Flash

    Components Description and Operation Table 3-8 • MSS SPI0 and MSS SPI1 Loopback and Off-Board SPI Device Connections Jumper Signal Connection Details SPI0_SDI To interface any SPI device to MSS SPI0 SPI0_SDO SPI0_SCK SPI0_SS SPI1_SDI To interface any SPI device to MSS SPI1 SPI1_SDO SPI1_SCK SPI1_SS...

  • Page 29: Spi Dac

    SmartFusion Development Kit SPI DAC One 12-bit SPI DAC AD5320 is available on the board. This can be optionally interfaced to either the SPI0 or SPI1 of the SmartFusion MSS. Figure 3-16 shows the SPI DAC instance along with the header that must be connected to the SPI_x_SDI, SPI_x_SCK, SPI_x_SS, and SPI_x_SDO pins of SPI0 or SPI1.

  • Page 30: I 2 C Eeprom

    Components Description and Operation Table 3-10 • To Interface MSS SP10 or MSS SPI1 to SPI DAC Jumper Signal Header/Jumper Signal Connection Details SPI0_SDI To Interface SPI DAC to MSS SPI0 SPI0_SDO JP3 (Pin1) VOUT SPI0_SCK SPI0_SS SYNC# SPI1_SDI To Interface SPI DAC to MSS SPI1 SPI1_SDO JP3 (Pin1) VOUT...
  • Page 31 SmartFusion Development Kit I2C_SCL_0_IN OLED_SCL {9} I2C_SCL_1_IN SPI_0_SCK {11} I2C_EEPROM_SCL I2C_EEPROM_SDA SPI_0_SI {11} I2C INTERFACE I2C INTERFACE I2C_SDA_1_IN I2C_SDA_0_IN OLED_SDA_IN {9} Figure 3-18 • MSS I2C0 and I2C1 Jumper Settings Table 3-12 • To Interface EtherCAT ET1100 to EEPROM EEPROM PIN ET1100 PIN Connection details Comment...

  • Page 32: Clock Oscillator

    Components Description and Operation Clock Oscillator A 50 MHz clock oscillator with 20 PPM is available on the board (Figure 3-20). This clock oscillator is connected to the FPGA fabric to provide a system reference clock and connected to the PHY to provide the RMII_CLK.

  • Page 33: Usb-To-Uart Interface

    SmartFusion Development Kit USB-to-UART Interface Included on the development board is a USB-to-UART interface with ESD protection (Figure 3-22). This interface includes an integrated USB-to-UART bridge controller (U16) to provide a standard UART connection with the SmartFusion MSS UART0 port. One application of the USB-to-UART interface is to allow HyperTerminal on a PC to communicate with the SmartFusion cSoC.

  • Page 34: Rs485 Interface

    Components Description and Operation RS485 Interface Included on the development board is an RS485 with DB9 female connector, interfacing with the MAX3240CSA connected to UART port 1 (Figure 3-23, Figure 3-24, and Figure 3-25 on page 35) of the SmartFusion MSS. This is provided for applications that require RS485, for which the UART port needs to be used in MODEM mode.

  • Page 35: Ethernet Interface

    SmartFusion Development Kit RS485_B RS485_A CONNECTOR DB9F CONNECTOR DB9F Manufacturer P/N = 152-3409 Manufacturer P/N = 152-3409 Manufacturer = Kobiconn Manufacturer = Kobiconn Figure 3-25 • DB9 Connector Ethernet Interface One Ethernet interface, configured for RMII full duplex mode, and a low-power 10/100 Mbps single-port Ethernet physical layer transceiver (U19) are provided on-board (Figure 3-27 on page 36).
  • Page 36 Components Description and Operation Clocking Scheme 2: From 20 MHz clock oscillator • 20 MHz oscillator goes as input to CCC. GLC output of CCC is configured at 50 MHz • The GLC output of CCC feeds MAC_CLK of 10/100 MAC •...

  • Page 37: Memory Section Overview

    3.3 V SRAM and flash devices. On the development board, two 16-Mbit SRAM Cypress CY7C1061DV33-10ZSXI and two 64-Mbit parallel flash memory Numonyx JS28F640J3D-75 memories interface with EMC region0 and region1. Microsemi expects these memories to be used in most SmartFusion applications.
  • Page 38 Components Description and Operation 3.3 V Memory Section Mounted on the development board are two instances of 16-Mbit asynchronous SRAM. Also included are two 64-Mbit parallel flash memories (FLASH). Both instances of the asynchronous SRAM are connected to region0 of the EMC interface of the SmartFusion MSS. Similarly both instances of the flash are connected to region1 of the EMC interface of the SmartFusion MSS.
  • Page 39 SmartFusion Development Kit Figure 3-29 • PSRAM Connections R e v i s i o n 7...
  • Page 40 Components Description and Operation Parallel Flash Memory Components (Flash) Two 64-Mbit parallel flash memories, Numonyx JS28F640J3D-75, are the 3.3 V flash memory instances populated on the board (Figure 3-30 on page 41). They interface with the EMC port of the SmartFusion MSS and provide off-chip high-speed nonvolatile memory that the hard ARM Cortex-M3 processor can use for applications such as storing compressed Linux images, which can be uncompressed using the SmartFusion MSS eNVM and stored into asynchronous SRAM.
  • Page 41 SmartFusion Development Kit Figure 3-30 • Flash Connections R e v i s i o n 7...
  • Page 42 Components Description and Operation 1.8 V Memory Section Overview Included on the development board one instance of 128-Mbit, 1.8 V, high density asynchronous SRAM (LG_PSRAM) interfacing region0 of the SmartFusion MSS EMC interface and 128-Mbit, 1.8 V, parallel flash memory (LG_FLASH) interfacing region1 of the EMC interface of SmartFusion MSS (Figure 3-31 on page 43).
  • Page 43 SmartFusion Development Kit V1P8 PS_ADDRESS1 PS_DATA0 {22} PS_ADDRESS1 PS_DATA0 {22} PS_ADDRESS2 PS_DATA1 {22} PS_ADDRESS2 PS_DATA1 {22} PS_ADDRESS3 PS_DATA2 {22} PS_ADDRESS3 PS_DATA2 {22} PS_ADDRESS4 PS_DATA3 {22} PS_ADDRESS4 PS_DATA3 {22} PS_ADDRESS5 PS_DATA4 {22} PS_ADDRESS5 PS_DATA4 {22} PS_ADDRESS6 PS_DATA5 {22} PS_ADDRESS6 PS_DATA5 {22} PS_ADDRESS7 PS_DATA6 {22}...
  • Page 44 Components Description and Operation Large Parallel Flash Memory Component (LG_FLASH) One 128 Mbit, 1.8 V, parallel flash memory, Numonyx JS28F128P30T85 873824, is the LG_FLASH mounted on the board (Figure 3-32). This memory interfaces with region0 of the SmartFusion MSS EMC. It provides a larger off-chip nonvolatile memory that the hard ARM Cortex-M3 processor can use for applications such as storing compressed Linux images, which can be uncompressed within SmartFusion MSS eNVM and stored into LG_SRAM.

  • Page 45: Using Emc I/Os As User I/Os

    SmartFusion Development Kit Using EMC I/Os as User I/Os When user applications do not require the EMC interface, the shared EMC I/Os can be used as general purpose I/Os. On the A2F500-DEV-KIT-2 board, this requires the mounted AGLP125 FPGA to be programmed with an IN to OUT design that provides a through path via the FPGA to the expansion connector for 3.3 V I/O.

  • Page 46: Ethernet For Control Automation Technology (Ethercat) Interface

    Components Description and Operation Ethernet for Control Automation Technology (EtherCAT) Interface Included on the development board is an EtherCAT interface (Figure 3-34, Figure 3-35, and Figure 3-36 on page 47). EtherCAT is an open, high performance, and Ethernet-based FieldBus system. EtherCAT applies Ethernet to automation applications that require short data update times with low communication jitter and low hardware costs.

  • Page 47: Low Cost Programming Stick (Lcps) Header

    SmartFusion Development Kit GND3 GND4 GND2 GND5 GND1 GND6 GND0 GND7 V3P3 PHY0_AD0 C230 C230 INT/PHYAD0 100nF,50V 100nF,50V {31,33,34} MI_CLK/LINKPOL VDDIO1 0603 0603 {31,33} MI_DATA MDIO VDDIO0 PHY0_2V5 C299 C299 C300 C300 VDDC PHY0_2V5A PHY0_2V5A PHY0_2V5A PHY0_2V5A 100nF,50V 100nF,50V 100nF,50V 100nF,50V DP_PHY0_TD+ FXSD/FXEN...

  • Page 48: Realview Header

    Components Description and Operation Refer to the schematic shown in Figure 3-37. Jumper settings are shown in Table 3-22 for A2F500 programming and SoftConsole application debug. TCK1 FP4_TCK VJTAGENB R129 R129 FP4_TMS GND3 FP4_TDI GND2 VJTAG FP4_TRST VJTAG TRSTB FP4_TDO VPUMP VPUMP GND4...

  • Page 49: Direct-C Programming Interface

    On the development board, a standard FlashPro4 10-pin connector is provided (Figure 3-39) to support DirectC programming (Microsemi’s in-system programming solution with DirectC). This connector interfaces with five GPIOs and follows the same pinout as FlashPro4. This can be used to program a Microsemi FPGA on another board...

  • Page 50: Flashpro4 Programming Header

    Components Description and Operation FlashPro4 Programming Header The SmartFusion cSoC device on this Development Kit Board can be programmed using a FlashPro4 programmer (Figure 3-41). Using the jumper settings in Table 3-25, A2F500 and AGLP125 devices can be programmed independently or in chain mode. In addition, FlashPro4 is used for software debugging by SoftConsole.
  • Page 51 SmartFusion Development Kit V3P3_F2 JTAGSEL V3P3_F2 MHS12304 MHS12304 JP12 JP12 V3P3_F2 U7-6 U7-6 JP11 JP11 HEADER 1x2 HEADER 1x2 JTAG SIGNALS JTAG SIGNALS VJTAG VPUMP VJTAG HEADER 1x2 HEADER 1x2 F2_TMS R295 R295 F2_TCK TRST TRSTB 0.1uF 0.1uF 0.01uF 0.01uF F2_TDO JTAGSEL JTAGSEL...
  • Page 52 Components Description and Operation U10F U10F AGLP125 CS289 AGLP125 CS289 SEC 6/6 SEC 6/6 AGL_TCK AGL_TDO R138 R138 AGL_TDI JTAG JTAG VJTAG VJTAG AGL_TMS TRST VPUMP TRST VPUMP R136 R136 R137 R137 AGLP125V5-CSG289 AGLP125V5-CSG289 Figure 3-43 • IGLOO PLUS JTAG To debug applications with SoftConsole, which uses FlashPro4, the settings shown in Table 3-27 required.
  • Page 53 SmartFusion Development Kit Battery Back-Up A 3.0 V Lithium ion battery, CR2032, is provided on the board. This connects to the VDDBAT input of the SmartFusion cSoC. This is useful in demonstrating battery backup and power-down modes of the SmartFusion cSoC. V3P3A V1P5A V3P3A...

  • Page 54: A2F500 Digital I/O Expansion Header

    Components Description and Operation A2F500 Digital I/O Expansion Header The board provides a digital I/O expansion header to interface with a daughter board with a digital interface. This digital header provides an interface to A2F500 fabric I/Os which includes seven pairs of LVDS TX/RX I/Os with proper termination.
  • Page 55 SmartFusion Development Kit Figure 3-47 (top view) indicates the orientation of the digital I/O expansion headers on the mother board and daughter board. Daughter Board Pin 2 Pin 1 CAN0 CAN1 Mother Board Figure 3-47 • Top View of A2F500 Digital I/O Expansion Headers Correct Orientation Note: On the mother board there are two CAN ports just adjacent to the A2F500 digital I/O expansion header, so the daughter card header needs to be placed in such a way that a full insertion is...

  • Page 56: Mixed Signal Header

    • This will provide maximum insertion into the SmartFusion evaluation board. • Use the SmartFusion Development Kit PCB files (www.microsemi.com/soc/download/rsc/?f=A2F500_DEV_KIT_BF). Mixed Signal Header The mixed signal header can be obtained from Samtec, using the following part numbers: • Mother board header 2X50 50 mil pitch: Samtec FTSH-150-04-L-D-RA (populated in the development board) •...
  • Page 57 When designing a mother board for an existing daughter board (MPM DB, for example): • Ensure that the length, denoted by XX, is kept less than 150 mils. • Use the SmartFusion Development Kit PCB files: www.microsemi.com/soc/download/rsc/?f=A2F500_DEV_KIT_BF R e v i s i o n 7...
  • Page 58 Components Description and Operation Pinout Definition Table 3-28 provides the pinout definition for the mixed signal header. Table 3-28 • Pinout Definition J21-Pin Net Name Number Description J21-Pin Net Name Number Description Power Power Power Power Power Power Power Power DGND DGND Digital ground...
  • Page 59 SmartFusion Development Kit Table 3-28 • Pinout Definition J21-Pin Net Name Number Description J21-Pin Net Name Number Description AV1_1 ABPS2 AV2_1 ABPS3 AGND AGND Analog ground AGND AGND Analog ground AV1_3 ABPS6 AV2_3 ABPS7 AGND AGND Analog ground AGND AGND Analog ground AV2_4 ABPS9...

  • Page 61: Pin List

    4 – Pin List Pin List for A2F500M3G-FGG484ES Devices Below is the pin list applicable to the SmartFusion A2F500M3G-FGG484ES devices. Table 4-1 • Pin List A2F500 Pin Number A2F500 Pin Name Board Signal Name GND1 GND7 EMC_CS0_N/GAB0/IO05NDB0V0 F2_MCS_N_0 EMC_CS1_N/GAB1/IO05PDB0V0 F2_MCS_N_1 GND8 EMC_AB[0]/IO06NDB0V0 EMC_AB[1]/IO06PDB0V0...
  • Page 62 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name VCCFPGAIOB0_4 V3P3_F2 EMC_BYTEN[0]/GAC0/IO07NDB0V0 MBYTEN_0 EMC_AB[2]/IO09NDB0V0 ADDRESS2 EMC_AB[3]/IO09PDB0V0 ADDRESS3 EMC_AB[6]/IO12NDB0V0 ADDRESS6 EMC_AB[14]/IO15NDB0V0 ADDRESS14 EMC_AB[15]/IO15PDB0V0 ADDRESS15 VCCFPGAIOB0_1 V3P3_F2 EMC_AB[18]/IO18NDB0V0 ADDRESS18 EMC_AB[19]/IO18PDB0V0 ADDRESS19 VCCFPGAIOB0_2 V3P3_F2 GBB0/IO24NDB0V0 LED1_N GBB1/IO24PDB0V0 LED2_N...
  • Page 63 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GBB2/IO27NDB1V0 F2-200-IO_7 GND15 EMC_DB[12]/IO87NDB5V0 DATA12 EMC_DB[13]/GAC2/IO87PDB5V0 DATA13 NC14 NC15 GND19 IO00NPB0V0 F2-500_N1 IO03NPB0V0 F2-500_N9 GND20 EMC_OEN0_N/IO08NDB0V0 MOE_N_0 EMC_AB[10]/IO11NDB0V0 ADDRESS10 EMC_AB[11]/IO11PDB0V0 ADDRESS11 EMC_AB[9]/IO13PDB0V0 ADDRESS9 GND16 GBC1/IO22PPB0V0...
  • Page 64 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GBC0/IO22NPB0V0 SWITCH5 NC16 VCCFPGAIOB0_7 V3P3_F2 VCOMPLA1 IO25NPB1V0 F2-500_E35 GND21 NC17 VCCFPGAIOB1_1 V3P3_F2 IO32NDB1V0 F2-200-PWM0 GFB1/IO82PPB5V0 F2-200-IO_8 IO84NPB5V0 RMII_50MHZ_CLK GFB2/IO85NDB5V0 F2-200-IO_1 EMC_DB[10]/IO86NPB5V0 DATA10 VCCFPGAIOB5_2 V3P3_F2 VCCPLL0 VCCPLA...
  • Page 65 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GNDQ4 NC25 GND28 VCCFPGAIOB0_11 V3P3_F2 GND24 VCCFPGAIOB0_8 V3P3_F2 GND25 VCCFPGAIOB0_9 V3P3_F2 GND26 VCCFPGAIOB0_10 V3P3_F2 GNDQ3 IO26PDB1V0 F2-500_E34 IO26NDB1V0 F2-500_E33 GCA2/IO28PDB1V0 SWITCH1 IO33NDB1V0 SWITCH2 GCB2/IO33PDB1V0 SWITCH3...
  • Page 66 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GCC0/IO35NPB1V0 DIP1 VCCFPGAIOB1_4 V3P3_F2 GCB0/IO34NDB1V0 CLK_50MHZ EMC_DB[6]/GEB0/IO79NDB5V0 DATA6 EMC_DB[5]/GEA1/IO78PDB5V0 DATA5 EMC_DB[4]/GEA0/IO78NDB5V0 DATA4 EMC_DB[3]/GEC2/IO77PPB5V0 DATA3 VCCFPGAIOB5_4 V3P3_F2 GFA0/IO81NDB5V0 F2-200-IO_5 VCCFPGAIOB5_5 V3P3_F2 GND40 VCC8 V1P5_DUT GND36 VCC5 V1P5_DUT...
  • Page 67 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name VCC10 V1P5_DUT GND43 VCC11 V1P5_DUT GND44 VCCFPGAIOB1_6 V3P3_F2 IO37NDB1V0 F2-500_E11 GDA1/IO40PDB1V0 PDI6/EEPROM_Loaded GDA0/IO40NDB1V0 DIRECTC_TDI GDC1/IO38PDB1V0 PDI1/SPI_SEL GDC0/IO38NDB1V0 PDI2/SPI_DI GND45 IO73PDB5V0 LVDS_RX_P0C IO73NDB5V0 LVDS_RX_N0C IO72PPB5V0 LVDS_TX_P4...
  • Page 68 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name IO72NPB5V0 LVDS_TX_N4 GNDQ6 IO68PDB5V0 LVDS_TX_P0 GND58 VCC20 V1P5_DUT GND59 VCC17 V1P5_DUT GND54 VCC18 V1P5_DUT GND55 VCC19 V1P5_DUT GND56 VCCFPGAIOB1_8 V3P3_F2 NC26 GDB2/IO42PDB1V0 CAN_TXD_1 VJTAG VJTAG GND57...
  • Page 69 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name VCCFPGAIOB1_9 V3P3_F2 VCCENVM V1P5_DUT GNDENVM NC28 GND64 IO69NDB5V0 LVDS_TX_N1 IO69PDB5V0 LVDS_TX_P1 GNDRCOSC GND70 NC29 NC30 GND71 VCC28 V1P5_DUT GND72 VCC25 V1P5_DUT GND66 VCC26 V1P5_DUT GND67...
  • Page 70 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GND73 VCC29 V1P5_DUT GND74 VCC30 V1P5_DUT GND75 VCC31 V1P5_DUT JTAGSEL JTAGSEL NC31 NC32 NC33 NC45 VCCFPGAIOB1_11 V3P3_F2 NC34 GND77 VCCMSSIOB4_1 V3P3_F2 GPIO_8/IO48RSB4V0 MSS_GP_IO_8 GPIO_11/IO66RSB4V0 MSS_GP_IO_11 GND80...
  • Page 71 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GPIO_5/IO51RSB4V0 MSS_GP_IO_5 GPIO_10/IO67RSB4V0 MSS_GP_IO_10 VCCMSSIOB4_3 V3P3_F2 MAC_RXD[1]/IO62RSB4V0 FPGA_ENA_RXD1 NC39 VCC33AP V3P3A VCC33N AGND VAREF0 VAREF_0 GND33ADC11 AGND ADC4 ADC4 GNDTM2 ATGND2 ADC11 ADC11 GNDVAREF AGND...
  • Page 72 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name NC40 GND83 SPI_0_DI/GPIO_17 SDI_0_IN SPI_1_DI/GPIO_25 SDI_1_IN UART_1_TXD/GPIO_28 TXD_1_OUT I2C_0_SDA/GPIO_22 I2C_SDA_0_IN I2C_1_SDA/GPIO_30 I2C_SDA_1_IN GPIO_2/IO54RSB4V0 MSS_GP_IO_2 GPIO_7/IO49RSB4V0 MSS_GP_IO_7 GND86 MAC_CRSDV/IO60RSB4V0 FPGA_ENA_CRS MAC_TXD[1]/IO64RSB4V0 FPGA_ENA_TXD1 SDD2 SDD2 GNDA0 AGND ABPS2...
  • Page 73 SmartFusion Development Kit Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name GNDTM0 ATGND0 ADC0 ADC0 VCC15ADC0 V1P5A ABPS7 AV2_3 ABPS8 AV1_4 GND33_ADC_2 AGND VDD15_ADC_2 V1P5A VCCMAINXTAL V3P3A SDD1 DACOUT1 PTEM V1P5_INT VCC33A V3P3A SPI_0_SS/GPIO_19 SS_0_OUT VCCMSSIOB2_4...
  • Page 74 Pin List Table 4-1 • Pin List (continued) A2F500 Pin Number A2F500 Pin Name Board Signal Name AA22 SPI_1_CLK/GPIO_26 SCLK_1_OUT GND9 GPIO_13/IO45RSB4V0 MSS_GP_IO_13 GPIO_14/IO44RSB4V0 MSS_GP_IO_14 GND11 PCAP N16866617 NCAP N16866619 ABPS3 AV2_1 ADC3 ADC3 GND15ADC0 AGND AB10 VCC33ADC1 V3P3A AB11 VAREF1 VAREF_1 AB12...

  • Page 75: Board Stackup

    Figure 5-2 on page 77. The full PCB design layout is provided on the SmartFusion Development Kit web page: www.microsemi.com/soc/products/hardware/devkits_boards/smartfusion_dev.aspx. ® To view the PCB design layout files, you can use Allegro Free Physical Viewer, which can be ®...
  • Page 76 Board Stackup Figure 5-1 shows the stack-up: Figure 5-1 • PCB Layer Stackup R e visio n 7...
  • Page 77 SmartFusion Development Kit Figure 5-2 shows the silkscreen top view. Figure 5-2 • Board Silkscreen Top View R e v i s i o n 7...

  • Page 79: Manufacturing Test

    This chapter defines and describes the specific A2F500-DEV-KIT-2 board testing procedures. Instructions for running the Microsemi A2F500-DEV-KIT-2 board tests are detailed. The steps needed to set up the test environment are also outlined. Associated files for this procedure can be downloaded from the Microsemi website at www.microsemi.com/soc/download/rsc/?f=A2F500-DEV-KIT_Mfg_PF.

  • Page 80: Installing The A2F500-Dev-Kit-2 Board Usb Serial Driver

    4. Restart the computer on which the driver was installed. After restart, the driver can be used to communicate with A2F500-DEV-KIT-2 board. Hooking up the Board and Programming Stick Connect the Microsemi A2F500-DEV-KIT-2 board to the Microsemi programming stick. Connect the J15 pins on the board to the programmer, as shown in Figure 6-1 on page Connect one end of USB mini B cables to the USB connections on the A2F500-DEV-KIT-2 board and the Microsemi programming stick.
  • Page 81 SmartFusion Development Kit Hooking Up the Board and Ethernet Cable Connect an Ethernet cable from the local area network to J10, the A2F500-DEV-KIT-2 Ethernet jack. Note: For the board Ethernet test to pass, the local network must be running a DHCP server that assigns an IP address to the web server on the board.

  • Page 82: Programming The A2F500-Dev-Kit-2 Board (Smartfusion Csoc Device)

    Manufacturing Test Hooking up the A2F500-DEV-KIT-2 Board and UART Cable Connect a D9 UART cable from the PC (COM port 1) to the P1 UART connector on the board. Note: This cable is needed for the RS485 test. Programming the A2F500-DEV-KIT-2 Board (SmartFusion cSoC Device) 1.
  • Page 83 SmartFusion Development Kit 3. Open the FlashPro programming software. Figure 6-4 • FlashPro New Project 4. Create a new programming project. 5. Select the option Single device when choosing the programming mode (Figure 6-5). Figure 6-5 • New Project Setup 6.
  • Page 84 Manufacturing Test Figure 6-6 • Manufacturing Test STAPL File Setup R e visio n 7...

  • Page 85: Setting Up The Test Terminal

    SmartFusion Development Kit Setting Up the Test Terminal 1. Open the Windows start menu. Select All > Programs > Accessories > Communications and select the HyperTerminal program (Figure 6-7). This opens HyperTerminal. If your computer does not have the HyperTerminal program, use any free serial terminal emulation program such as PuTTY or Tera Term.
  • Page 86 Manufacturing Test 2. The Connection Description window is displayed (Figure 6-8). Type in A2F500-DEV-KIT as the name of the new HyperTerminal session (Figure 6-8) and click OK. Figure 6-8 • HyperTerminal Connection Description 3. The Connect To window is displayed. Select the COM port for which A2F500-DEV-KIT-2 is connected (Figure 6-9).
  • Page 87 SmartFusion Development Kit 4. The COM4 Properties window is displayed. Select the following settings (Figure 6-10): Bits per second = 19200 Data bits = 8 Parity = None Stop bits = 1 Flow Control = None Figure 6-10 • HyperTerminal Port Settings R e v i s i o n 7...
  • Page 88 Manufacturing Test 5. Select File > Properties in the HyperTerminal window. Choose the Settings tab (Figure 6-11). Figure 6-11 • HyperTerminal Properties 6. Click the ASCII Setup button. Select the check box labeled Append line feeds to incoming line ends (Figure 6-12).

  • Page 89: Running The A2F500-Dev-Kit-2 Board Test

    SmartFusion Development Kit Running the A2F500-DEV-KIT-2 Board Test 1. Press the button labeled SW8 on the A2F500-DEV-KIT-2 board to start the test program. The menu shown in Figure 6-13 is displayed on the terminal. Figure 6-13 • Manufacturing Test Menu Note: If this message does not appear, then try pressing button SW8 again.
  • Page 90 Manufacturing Test Figure 6-14 • Reset Test R e visio n 7...
  • Page 91 SmartFusion Development Kit 2. Enter 0 into the terminal to begin the reset test. The result should be similar to what is shown in Figure 6-15. Figure 6-15 • Reset Test Result 3. If the menu appears correct, enter the character Y into the terminal. R e v i s i o n 7...
  • Page 92 Manufacturing Test UART Test 1. Enter 1 into the terminal to begin the UART test. Type the character Y into the terminal. The result will be similar to Figure 6-16. Figure 6-16 • UART Test R e visio n 7...
  • Page 93 SmartFusion Development Kit Ethernet Test 1. Enter 2 into the terminal to begin the Ethernet test. A screen similar to Figure 6-17 should appear. Figure 6-17 • Ethernet Test Note: The IP address may vary in the network setup. R e v i s i o n 7...
  • Page 94 Manufacturing Test Analog Test 1. Enter 3 into the terminal to begin the Analog test. A screen similar to Figure 6-18 should appear. Figure 6-18 • Analog Test 2. Locate POT RV1 on bottom left hand corner of the board. Turn POT RV1 counter-clockwise all the way to the left, as shown in Figure 6-19.
  • Page 95 SmartFusion Development Kit Figure 6-20 • Analog Test 3. Turn POT RV1 clockwise all the way clockwise all the way to the right. A display similar to Figure 6-21 should appear on the terminal. R e v i s i o n 7...
  • Page 96 Manufacturing Test Figure 6-21 • Analog Test Results R e visio n 7...
  • Page 97 SmartFusion Development Kit OLED Test 1. Enter 4 into the terminal to begin the OLED test. 2. Check the board OLED display. If the characters ACTEL MAN TEST are displayed in the OLED, then enter Y in the terminal; otherwise, enter N. If Y was entered, the screen shown in Figure 6-22 will be displayed: Figure 6-22 •...
  • Page 98 Manufacturing Test RTC Test 1. Enter 5 into the terminal to begin the RTC test. After a few seconds, the screen shown in Figure 6-23 should appear. Figure 6-23 • RTC Test R e visio n 7...
  • Page 99 SmartFusion Development Kit Memory Test 1. Enter 6 into the terminal to begin the SmartFusion Memory (EMC) test. After several seconds, the screen shown in Figure 6-24 should appear. Figure 6-24 • Memory Test 2. Make sure jumpers JP17, JP19, and JP16 are set correctly and enter Y into the terminal. The display shown in Figure 6-25 should appear in the terminal.
  • Page 100 Manufacturing Test Figure 6-25 • Memory Test Passed 1 0 0 R e vi s i o n 7...
  • Page 101 SmartFusion Development Kit SPI Test Enter 7 into the terminal to begin the SPI test. After several seconds, the screen shown in Figure 6-26 should appear. Figure 6-26 • SPI Test Results R e v i s i o n 7...
  • Page 102 Manufacturing Test Switch/LED Test 1. Enter 8 into the terminal to begin the LEDs test. The screen shown in Figure 6-27 is displayed. Figure 6-27 • Switch/LEDs Test Figure 6-28 • DIP Switch Settings 2. Press push-buttons SW1, SW2, SW3, SW4 and SW5. When any of these buttons is pressed, the LEDs should light up.
  • Page 103 SmartFusion Development Kit Figure 6-29 • Switch Test R e v i s i o n 7...
  • Page 104 Manufacturing Test C EEPROM Enter 9 into the terminal to begin the I C EEPROM test. The screen shown in Figure 6-30 is displayed after few seconds. Figure 6-30 • I C EEPROM Test 1 0 4 R e vi s i o n 7...
  • Page 105 SmartFusion Development Kit RS485 Test 1. Open another terminal window, this time set to COM. Configure as shown in Figure 6-31 through Figure 6-33 on page 106. Figure 6-31 • COM1 Setting Figure 6-32 • Connect To Dialog R e v i s i o n 7...
  • Page 106 Manufacturing Test Figure 6-33 • ASCII Setup 2. Enter A into the terminal to begin the RS485 test. The screen shown in Figure 6-34 on page 106 is displayed. Figure 6-34 • RS485 Test 1 0 6 R e vi s i o n 7...
  • Page 107 SmartFusion Development Kit The display in the COM1 terminal window should be similar to Figure 6-35. Figure 6-35 • RS485 Test Message 3. Enter the character Y into this terminal. The display on the COM1 terminal should be similar to Figure 6-36.
  • Page 108 Manufacturing Test Figure 6-37 • RS485 Test Passed 1 0 8 R e vi s i o n 7...
  • Page 109 SmartFusion Development Kit AGL Memory Test 1. Turn off the board by flipping switch SW6 off. 2. Place board jumpers JP17, JP19, and JP16 in the following positions: JP17: 1–2 JP19: 1–2 JP16: 1–2 3. Turn on board power by flipping switch SW6. Press the reset button SW8. The screen shown in Figure 6-38 should appear.
  • Page 110 Manufacturing Test 4. Enter B into the terminal to begin the AGL memory test. The screen shown in Figure 6-39 displayed. Figure 6-39 • AGL Memory Test 1 1 0 R e vi s i o n 7...
  • Page 111 SmartFusion Development Kit 5. When the jumpers are set, enter Y into the terminal. The display on the terminal should be similar Figure 6-40, and eventually Figure 6-41 on page 112. Figure 6-40 • AGL Test – Erasing Chip R e v i s i o n 7...

  • Page 112: A2F500-Dev-Kit-2 Board Failures

    Manufacturing Test Figure 6-41 • AGL Test Passed A2F500-DEV-KIT-2 Board Failures All tests outlined in "Running the A2F500-DEV-KIT-2 Board Test" on page 89 should result in the words TEST PASSED being printed on the terminal. If this does not happen, or the words TEST FAILED are printed, the test has failed.

  • Page 113: A List Of Changes

    SmartFusion Development Kit A – List of Changes The following table lists critical changes that were made in the current version of the chapter. Revision Changes Page The part number of the kit was changed from A2F500-DEV-KIT to A2F500-DEV-KIT-2 Revision 7 throughout the document (SAR 43384).
  • Page 114 List of Changes Revision Changes Page Revision 2 Replaced the LVDS I/Os section with the "A2F500 Digital I/O Expansion Header" (continued) section, which explains LVDS pairs also. Updated Table 4-1 • Pin List. Added a reference to the Configuring Serial Terminal Emulation Programs tutorial.

  • Page 115: B Product Support

    Microsemi SoC Products Group staffs its Customer Technical Support Center with highly skilled engineers who can help answer your hardware, software, and design questions about Microsemi SoC Products. The Customer Technical Support Center spends a great deal of time creating application notes, answers to common design cycle questions, documentation of known issues, and various FAQs.

  • Page 116: Itar Technical Support

    For technical support on RH and RT FPGAs that are regulated by International Traffic in Arms Regulations (ITAR), contact us via soc_tech_itar@microsemi.com. Alternatively, within Cases, select Yes in the ITAR drop-down list. For a complete list of ITAR-regulated Microsemi FPGAs, visit the ITAR web page.

  • Page 117: Index

    115 clock oscillator email 115 contacting Microsemi SoC Products Group My Cases 116 customer service 115 outside the U.S. 116 email 115 technical support 115 web-based technical support 115 website 115...
  • Page 118 Microsemi Corporate Headquarters One Enterprise, Aliso Viejo CA 92656 USA © 2012 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Within the USA: +1 (949) 380-6100 Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.

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