System Bus Connecting Pins - Epson S1D13700 User's & Technical Manual

2: PINS
2.2.3

System Bus Connecting Pins

Tristate input/output, active high
DB0 – DB7
These pins comprise an 8-bit bidirectional data bus, which is connected to the 8-bit or 16-bit MPU data bus.
Input, active high
The S1D13700 allows the MPU interface format to be changed depending on how CNF2 and CNF3 are set,
so that it can be connected directly to the 80-series MPU (e.g., Z80
or 6802), or the MC68K-series MPU (68000) bus.
CNF3
CNF2
CNF3
Settings marked with * are inhibited.
Note 3: Normally, CNF2 and CNF3 should be corrected directly to power supply V
the mixture of noise. Should noise be mixed in, insert a capacitor between the CNF2 and
CNF3 lines and V
noise.
Input, active high
AB15 – AB1
Normally, the MPU address bus is connected to these pins. The data bus signal is discriminated by a combi-
AB0
nation of RD# and WR# signals, or R/W#, E, and LDS signals, as listed in the table below.
Input: CNF4 = 0 selects direct access; CNF4 = 1 selects indirect access.
<Direct access for the 80-series interface>
CNF4
*AB15–AB0 are used as register addresses.
<Indirect access for the 80-series interface>
CMF4
CNF4
10
AB15
CNF2 Mode
– AB1
0 0 80 series
0 1 *
1 0 6800
1 1 MC68K
, as close to the IC pins as possible. This will help to effectively eliminate
SS
AB15
AB0 RD#
– AB1
0 0or1 0or1 0
0 0or1 0or1 1
AB15
AB0 RD#
– AB1
1 – 0 0
1 – 1 0
1 – 0 1
1 – 1 1
AB0 RD# WR#
↑ ↑ ↑ ↑
* * *
↑ ↑
E R/W#
↑ ↑
LDS# R/W#
WR#
Read from command/parameter
1
registers
0 Write to command/parameter registers
WR#
1
Data (display data and cursor address)
1
read
Data (display data and parameter)
0
write
0 Command write (code only)
EPSON
®
or GenericBus), 68-series MPU (6809
DB7
CS# WAIT#
– DB0
↑ ↑
* * *
↑ ↑
↑ ↑
DTACK#
or V
DD
Function
Function
–
S1D13700 Technical Manual
AS#
↑
–
* *
– –
↑
Note 3
to prevent
SS