Use Of Hypertext; Reference Documents; Revision History - IDT 89HPES48T12G2 User Manual

IDT
Notes
PES48T12G2 User Manual
Type Abbreviation
Read Only
Read and Write
Read and Write Clear
Read and Write when
Unlocked
Sticky
Switch Sticky

Use of Hypertext

In Chapter 14, Tables 14.4, 14.5 and 14.6 contain register names and page numbers highlighted in blue
under the Register Definition column. In pdf files, users can jump from this source table directly to the regis-
ters by clicking on the register name in the source table. Each register name in the table is linked directly to
the appropriate register in the register section of Chapters and 16. To return to the source table after having
jumped to the register section, click on the same register name (in blue) in the register section.

Reference Documents

[1] PCI Express Base Specification Revision 2.0., December 20, 2006, PCI-SIG.
[2] Multicast Engineering Change Notice to [1]., May 8, 2008, PCI-SIG.
[3] Internal Error Reporting Engineering Change Notice to [1]., April 24, 2008, PCI-SIG.
[4] SMBus Specification, Version 2.0, August 3, 2000, SBS Implementers Forum.

Revision History

November 5, 2008: Initial publication of preliminary user manual.
January 12, 2009: On page 3-6, added last sentence to Port Arbitration section on page 3-6. In Table
8.10, under Description for Function in D3Hot state, changed reference to 10-1 instead of 9-1.
January 22, 2009: In Chapter 12, Table 12.15, changed the description for bit USA. In Chapter 15,
PCIEDCTL register, changed the description for bit ERO.
RO Software can only read registers/bits with this attribute. Contents
are hardwired to a constant value or are status bits that may be
set and cleared by hardware. Writing to a RO location has no
effect.
RW Software can both read and write bits with this attribute.
RW1C Software can read and write to registers/bits with this attribute.
However, writing a value of zero to a bit with this attribute has no
effect. A RW1C bit can only be set to a value of 1 by a hardware
event. To clear a RW1C bit (i.e., change its value to zero) a value
of one must be written to the location. An RW1C bit is never
cleared by hardware.
RWL Software can read the register/bits with this attribute. Writing to
register/bits with this attribute will only cause the value to be modi-
fied if the REGUNLOCK bit in the SWCTL register is set. When
the REGUNLOCK bit is cleared, writes are ignored and the regis-
ter/bits are effectively read-only.
Fields with this attribute are implicitly SWSticky (i.e., their value is
preserved across all resets, except switch fundamental reset).
Sticky Register/bits with this designation take on their initial value as a
result of a switch fundamental reset or fundamental reset. Other
resets have no effect.
SWSticky Register/bits with this designation take on their initial value as a
result of a switch fundamental reset. Other resets have no effect.
Table 2 Register Terminology (Sheet 2 of 2)
4
Description
April 5, 2013