IDT 89HPES48T12G2 User Manual page 188

IDT PCI to PCI Bridge and Proprietary Port Specific Registers
PCIEDSTS - PCI Express Device Status (0x04A)
Bit
Field
0
1
2
3
4
5
15:6
PCIELCAP - PCI Express Link Capabilities (0x04C)
Bit
Field Name
3:0 MAXLNKSPD
PES48T12G2 User Manual
Field Default
Type
Name Value
CED RW1C
NFED RW1C
FED RW1C
URD RW1C
AUXPD RO
TP RO
Reserved RO
Field Default
Type
Value
RO
0x0 Correctable Error Detected. This bit indicates the status of cor-
rectable errors. Errors are logged in this register regardless of
whether error reporting is enabled or not.
0x0 Non-Fatal Error Detected. This bit indicates the status of correct-
able errors. Errors are logged in this register regardless of whether
error reporting is enabled or not.
0x0 Fatal Error Detected. This bit indicates the status of Fatal errors.
Errors are logged in this registers regardless of whether error
reporting is enabled or not.
0x0 Unsupported Request Detected. This bit indicates the device
received an Unsupported Request. Errors are logged in this regis-
ter regardless of whether error reporting is enabled or not.
0x0 Aux Power Detected. Devices that require AUX power, set this bit
when AUX power is detected.This device does not require AUX
power, hence the value is hardwired to zero.
0x0 Transactions Pending. The P2P bridges within the switch do not
issue Non-Posted Requests on their own behalf. Therefore, this
field is hardwired to zero.
0x0 Reserved field.
0x2 Maximum Link Speed. This field indicates the supported link
speeds of the port.
1 - (gen1) 2.5 Gbps
2 - (gen2) 5 Gbps
others - reserved
15 - 14
Description
Description
April 5, 2013