Table of Contents
Advertisement
Detailed Description
29. DONE LED
The DONE LED indicates the status of the DONE pin on the FPGA. It should be lighted
when the FPGA is successfully configured.
30. Program Switch
This switch grounds the FPGA's Prog pin when pressed. This action clears the FPGA.
31. Configuration Address and Mode DIP Switches
This 6-position DIP switch controls the configuration address and FPGA configuration
mode.
The three leftmost switches choose one of eight possible configuration addresses. These
three DIP switches provide the System ACE controller and the CPLD the possibility of
using up to eight different configuration images as set by these three switches. The
Platform Flash memory supports up to four different images.
The three rightmost DIP switches set the FPGA configuration mode pins M2, M1, and M0
as shown in
Table 15: Configuration Mode DIP Switch Settings
32. Encryption Key Battery
An onboard battery holder is connected to the V
encryption key for the FPGA. A 12-mm lithium coin battery (3V), such as Panasonic part
numbers BR1216, CR1216, and BR1225, or any other appropriate 12-mm lithium coin
battery (3V) can be used.
33. Configuration Source Selector Switch
The configuration source selector switch (SW12) selects between System ACE, Platform
Flash, and linear flash/CPLD methods of programming the FPGA. Whichever method is
selected to program the FPGA, make sure the FPGA configuration mode switches are set
appropriately for the desired method of configuration. The PC4 connector allows JTAG
download and debug of the board regardless of the setting of the configuration source
selector switch.
www.BDTIC.com/XILINX
30
Table
15.
M2
M1
M0
0
0
0
Master Serial
1
1
1
Slave Serial
0
1
1
Master Parallel (SelectMAP)
1
1
0
Slave Parallel (SelectMAP)
1
0
1
JTAG
www.xilinx.com
Mode
pin of the FPGA to hold the
BATT
ML401/ML402/ML403 Evaluation Platform
UG080 (v2.5) May 24, 2006
R
Advertisement
Table of Contents
