Timx Auto-Reload Register (Timx_Arr) - ST STM32F101xx Reference Manual

General-purpose timers (TIM2 to TIM5)
Reset value: 0x0000
15 14 13
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency CK_CNT is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event.
15.4.12

TIMx auto-reload register (TIMx_ARR)

Address offset: 0x2C
Reset value: 0x0000
15 14 13
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Bits 15:0 ARR[15:0]: Prescaler value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the
and behavior.
The counter is blocked while the auto-reload value is null.
400/1096
12 11 10 9
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12 11 10 9
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Section 15.3.1: Time-base unit on page 349
Doc ID 13902 Rev 12
8 7 6 5
PSC[15:0]
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CK_PSC
8 7 6 5
ARR[15:0]
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4 3 2
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/ (PSC[15:0] + 1).
4 3 2
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for more details about ARR update
RM0008
1 0
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1 0
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