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RM-356
System Module and User Interface
The camera module is SMIA85 compliant and is configured by the DM500 using I2C control bus. Image data
is transferred to the DM500 over a CCP balanced bus (HIRES_CCP).
Secondary VGA camera
The camera module is SMIA compliant module and is configured by the DM500 using I2C control bus. Image
data is transferred to the DM500 over a CCP balanced bus (LORES_CCP).
Flash LED
Camera flash LED is controlled from the DM500 via the ADP1653 driver. The driver has GPIO control for STROBE/
ENABLE and I2C bus control for configuring.
Powering
The camera subsystem is powered from 1.3V, 1.8V and 2.8V and is generated internally in the subsystem
from the VBAT. The LED driver is powered directly from the VBAT supply. These supplies are turned off/on by
the host processor using the GPIO (Julie_REG_EN), depending in the camera usage.
Block diagram
Figure 62 Imaging and video subsystem block diagram

Imaging HWA

This devices uses a separate imaging and video engine. Its main ASIC is DM500 processor (N1400), which
compresses and decodes camera pictures and video stream. It is connected to the Rapido with a CCP2 serial
interface for data, and SPI interface for control commands.
Two camera modules are connected to the DM500 with CCP2 interface – the 3 megapixel main camera (X1450,
SMIA socket) and VGA secondary camera (N1450). The I2C bus is used for both cameras as a control interface.
The I2C is also controlling the flash driver, ADP1653 (N1451). The flash driver has a TX_MASK feature, which
reduces flash current during the RF TX bursts to prevent excessive current drain from the battery.
Page 6 –22
COMPANY CONFIDENTIAL
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