Timing Chart For The Dual Ramp Ad Converter - Canon A-1 Repair Manual

Constant Slope
--
, -
,-
,
,
EI
Low.,- -
--
--
,
,
,
,
,
...... - - - T I
----ol---
Tz
to
t
I
Fig. 10 Timing Chart for the Dual Ramp
AD Converter
tz
(2)
Dual Ramp Integration Analog-Digital Converter
The analog information on brightness sensed by SPC
must be converted into digital signal . The A-l
incorporates a dual ramp integration analog-digital
converter.
Let us describe principles of the dual ramp integra-
tion analog-digital converter (Fig. 9). Ex is a
pre-metered voltage from SPC which is connected with
the "a" terminal of the switch 51. When the switch
52, starting at the time "TO
tl,
is turned off, Ex is
introduced into the integration circuit which consists
of the registor "R II
,
the capaCitor
"C",
and the
amplifier "A" and is integrated for a fixed time "TIll.
The output voltage "EO" at this time can be obtained
as follows:
E.
=....!.. f2
Exd
t
CRt"
T,
= -
Ex
CR
The timer generates the voltage which is proportionate
to the input voltage Ex and the integration time Tl .
This timer is controlled to integrated for the fixed
time (Tl) of lamS. This means that the final value
of EO changes according to Ex only. Turning the
timer's switch to the "b" at the time "tlll after a
lapse of the time "Tl" ' Ex and a given voltage Eref.
37