Yamaha HTR-4064 Service Manual page 67

Pin
Port Name
No.
CS1/A22/RXD6/SCL6/STXD6/
86
P4_6
87 CS2/A21/CLK6/P4_5
CS3/A20/N_CTS6/N_RTS6/N_
88
SS6/P4_4
A19/TXD3/SDA3/SRXD3/
89
OUTC2_0/ISTXD2/IEOUT/P4_3
90 P11_6
A18/RXD3/SCL3/STXD3/ISRXD2/
91
IEIN/P4_2
92 P11_5
93 A17/CLK3/P4_1
A16/N_CTS3/N_RTS3/N_SS3/
94
P4_0
95 P16_7/TXD10
96 P16_6/RXD10
97 P16_5/CLK10
98 P16_4/N_CTS10/N_RTS10
99 A15/[A15/D15]/TA4IN/U/P3_7
100 A14/[A14/D14]/TA4OUT/U/P3_6
101 A13/[A13/D13]/TA2IN/W/P3_5
102 A12/[A12/D12]/TA2OUT/W/P3_4
103 P16_3/TXD9
104 P16_2/RXD9
105 P16_1/CLK9
106 P16_0/N_CTS9/N_RTS9
107 A11/[A11/D11]/TA1IN/V/P3_3
108 A10/[A10/D10]/TA1OUT/V/P3_2
A9/[A9/D9]/TA3OUT/UD0B/UD1B/
109
P3_1
110 D20/P12_4
D19/N_CTS6/N_RTS6/N_SS6/
111
P12_3
112 D18/RXD6/SCL6/STXD6/P12_2
113 D17/CLK6/P12_1
114 D16/TXD6/SDA6/SRXD6/P12_0
115 VCC
A8/[A8/D8]/TA0OUT/UD0A/UD1A/
116
P3_0
117 VSS
118 A7/[A7/D7]/AN2_7/P2_7/TXD10
119 A6/[A6/D6]/AN2_6/P2_6/RXD10
120 A5/[A5/D5]/AN2_5/P2_5/CLK10
A4/[A4/D4]/AN2_4/P2_4/N_
121
CTS10/N_RTS10
122 A3/[A3/D3]/AN2_3/P2_3/TXD9
123 A2/[A2/D2]/AN2_2/P2_2/RXD9
A1/[A1/D1]/BC2/[BC2/D1]/AN2_1/
124
P2_1/CLK9
A0/[A0/D0]/BC0/[BC0/D0]/AN2_0/
125
P2_0/N_CTS9/N_RTS9
126 D15/N_INT5/IIO0_7/IIO1_7/P1_7
127 D14/N_INT4/IIO0_6/IIO1_6/P1_6
128 D13/N_INT3/IIO0_5/IIO1_5/P1_5
I/O
Function Name
POWER
(P.C.B.)
ON
A[22] B
A[21] B
A[20] B
A[19] B
VIDI2C_ON O
A[18] B
HTX_AUSEL O
A[17] B
A[16] B
DK1_MOSI O
DK1_MISO I
HTX_N_RST O
HRX_N_RST O
A[15] B
A[14] B
A[13] B
A[12] B
TXD9 O
RXD9 O
CLK9 O
HEQ_N_RST O
A[11] B
A[10] B
A[9] B
FPGA_N_CFG O
FPGA_N_STA I
USB_SCL O
FPGA_CDONE I
USB_SDA I/O
VCC
A[8] B
VSS
A[7] B
A[6] B
A[5] B
A[4] B
A[3] B
A[2] B
A[1] B
NC
D[15] B
D[14] B
D[13] B
Detail of Function
OFF
O External bus
O External bus
O External bus
O External bus
O I2C line switch to video device
O External bus
O HDMI TX sound select
O External bus
O External bus
O Dock1 transmission data (/Debug)
I Dock1 reception data (/Debug)
O HDMI TX reset
O HDMI RX reset
O External bus
O External bus
O External bus
O External bus
O Spare
O Spare
O Spare
O HDMI switcher reset
O External bus
O External bus
O External bus
O FPGA nCONF
I FPGA nSTATUS
O USB I2C clock
I FPGA config done
O USB I2C data
---
O External bus
---
O External bus
O External bus
O External bus
O External bus
O External bus
O External bus
O External bus
Unconnected (impossible of I/O port use)
I External bus
I External bus
I External bus
RX-V471/HTR-4064
67