LH75400/01/10/11 (Preliminary) User's Guide
15.2.2.12 Timer 1 Compare Registers
There are two CMP(n) Registers for Timer 1. They are designated:
• CMP0
• CMP1
Each register is a 16-bit, Read/Write register. Contents of these registers are compared
continuously with the counter CNT. When both register and counter values match, a trigger
signal is generated.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
Table 15-26. CMP(n) Registers
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
1
1
1
1
1
RW
RW
RW
RW
RW
Table 15-27. CMP(n) Register Definitions
BITS FIELD NAME
31:16
///
Reserved Read as zero.
15:0
TM1CMP
Timer 1 Compare 16-bit Compare Register Value.
26
25
24
23
22
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
6
TM1CMP
1
1
1
1
1
RW
RW
RW
RW
RW
CMP0: 0xFFFC4000 + 0x40
CMP1: 0xFFFC4000 + 0x44
DESCRIPTION
6/17/03
21
20
19
18
17
0
0
0
0
0
R
R
R
R
R
5
4
3
2
1
1
1
1
1
1
RW
RW
RW
RW
RW
Timers
16
0
R
0
1
RW
15-23