Chapter 12 - Direct Memory Access Controller; Dma Controller Features; Table 12-1. Dma Controller Stream Assignments And Request Priority - Sharp Blue Treak LH75400 User Manual

Chapter 12
Direct Memory Access
Controller
The Direct Memory Access (DMA) Controller provides DMA support for the DMA-capable
peripherals listed in Table 12-1. It is not used for the display system. The LCD Controller
has its own DMA port for connecting directly to the memory system for retrieving display
data. The DMA is controlled by the system clock.
One central DMA Controller services all the peripheral DMA requirements. The controller
has an APB slave port for programming of its registers by the ARM and an AHB port for
data transfers.

Table 12-1. DMA Controller Stream Assignments and Request Priority

12.1 DMA Controller Features

The DMA Controller has the following features:
• Four data streams
• Three modes of transfer:
– Memory to Memory (selectable on Stream3 only)
– Peripheral to Memory (all streams)
– Memory to Peripheral (all streams).
• Built-in data stream arbiter
• Seven registers for each stream:
– DMA enable
– Transfer Size (Byte, Half-word, Word)
– Burst Size (1, 4, 8, or 16)
– Address Increment Enable
– Transfer Direction
– Maximum Count
– Terminal Count.
DMA REQUEST SOURCE
UART1RX (highest priority)
UART1TX
UART0RX/External Request (DREQ)
UART0TX (lowest priority)
7/15/03
DMA STREAM
Stream0
Stream1
Stream2
Stream3
12-1