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Samsung S3C8248 User Manual page 8

8-bit cmos

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S3C8248/C8245/P8245/C8247/C8249/P8249
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions (Continued)
Pin
Pin
Names
Type
ADC0–ADC6
ADC7
AV
REF
AV
SS
INT0–INT7
RESET
TEST
SDAT, SCLK
O
V
V
DD,
SS
X
X
OUT,
IN
SCK, SO, SI
I/O
V
VLDREF
TACAP
TACLK
TAOUT/TAPWM
O
TBPWM
O
T1CAP
T1CLK
T1OUT/T1PWM
O
COM0–COM3
O
SEG0–SEG15
O
SEG16–SEG23
O
SEG24–SEG31
O
V
–V
O
LC0
LC2
BUZ
O
CA, CB
Description
I
A/D converter analog input channels
A/D converter reference voltage
A/D converter ground
I
External interrupt input pins
I
System reset pin
(pull-up resistor: 250 kΩ)
I
0 V: Normal MCU operating
5 V: Test mode
12 V: for OTP writing
Serial OTP interface pins; serial data
and clock
Power input pins for CPU operation
(internal) and Power input for OTP
Writing
Main oscillator pins
Serial I/O interface clock signal
I
Voltage detector reference voltage
input
I
Timer A Capture input
I
Timer A External clock input
Timer A output and PWM output
Timer B PWM output
I
Timer 1 Capture input
I
Timer 1 External clock input
Timer 1 output and PWM output
LCD common signal output
LCD segment output
LCD segment output
LCD Segment output
LCD power supply
0.5, 1, 2 or 4 kHz frequency output for
buzzer sound with 4.19 MHz main
system clock or 32768 Hz subsystem
clock
Capacitor terminal for voltage booster
Pin
PRODUCT OVERVIEW
Circuit
Pin
Type
Numbers
F–10
36–42
F–18
43
44
45
D–4
20–27
B
19
16
D–2
10, 11
12, 13
14, 15
E–2
33–35
F–18
43
D–2
10
D–2
9
D–2
8
D–2
7
E–2
28
E–2
29
E–2
30
H
51–54
H
55–70
H–14
71–78
H–14
79–6
48–50
E–2
32
46–47
Share
(note)
Pins
P2.0–P2.6
P2.7
P0.0–P0.7
P3.3, P3.4
P1.5–P1.7
P2.7
P3.3
P3.2
P3.1
P3.0
P1.0
P1.1
P1.2
P4.0–P4.7
P5.0–P5.7
P1.4
1-7

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C8245P8245C8249C8247P8249