Motorola M68CPU32BUG Manuals

Manuals and User Guides for Motorola M68CPU32BUG. We have 1 Motorola M68CPU32BUG manual available for free PDF download: User Manual

Motorola M68CPU32BUG User Manual

Motorola M68CPU32BUG User Manual (196 pages)

DEBUG MONITOR

Brand: Motorola | Category: Monitor | Size: 0.42 MB

Table of Contents

Table of Contents
3
Chapter 1 General Information

9
- Introduction
  9
- General Description
  9
- Cpu32Bug Operation Mode Flow Diagram
  10
- Using this Manual
  11
- Installation and Start-Up
  11
- System Restart
  12
  - Abort
    12
  - Reset
    12
  - Break
    13
- Memory Requirements
  13
- BCC Memory Map
  14
- Terminal Input/Output Control
  15
Chapter 2 Debug Monitor Description

17
- Introduction
  17
- Entering Debugger Command Lines
  17
  - Syntactic Variables
    18
  - Expression as a Parameter
    19
  - Address as a Parameter
    20
  - Offset Registers
    21
- Debugger Address Parameter Format
  21
  - Port Numbers
    23
- Entering and Debugging Programs
  23
- Calling System Utilities from User Programs
  23
- Preserving Debugger Operating Environment
  23
- Function Code Support
  28
- Introduction
  31
  - Debug Monitor Commands
    31
- Block of Memory Compare (BC)
  33
- Block of Memory Fill (BF)
  35
- Block of Memory Fill Bf
  36
- Block of Memory Move (BM)
  37
- Breakpoint Insert/Delete (BR/NOBR)
  39
- Block of Memory Search (BS)
  40
- Block of Memory Verify (BV)
  43
CHAPTER 3 DEBUG MONITOR COMMANDS (Continued)

43
- Data Conversion (DC)
  45
- Dump S-Records (DU)
  46
- Go to Next Instruction (GN)
  51
- Go Execute User Program (GO)
  53
- Go to Temporary Breakpoint (GT)
  56
- Help (H)
  58
- Load S-Records from Host (LO)
  61
- Macro Define/Display/Delete (MAL/NOMA)
  64
- Macro Edit (MAE)
  67
- Macro Expansion Listing Enable/Disable (MAL/NOMAL)
  69
- Memory Display (MD)
  70
- Memory Modify (MM)
  72
- Memory Set (MS)
  74
- Offset Registers Display/Modify (OF)
  75
- Printer Attach/Detach (PA/NOPA)
  78
- Port Format (PF)
  79
  - List Current Port Assignments
    79
  - Port Configuration
    79
  - Port Format Parameters
    80
  - New Port Assignment
    81
- Register Display (RD)
  82
- Cold/Warm Reset (RESET)
  86
- Register Modify (RM)
  87
- Register Set (RS)
  88
- Switch Directories (SD)
  89
- Trace (T)
  90
  - Trace on Change of Control Flow
    93
- Transparent Mode (TM)
  95
  - Trace to Temporary Breakpoint
    96
- Verify S-Records against Memory (VE)
  98
Chapter 4 Assembler/Disassembler

103
- Introduction
  103
- Source Program Coding
  104
  - Operation Field
    105
  - Source Line Format
    105
  - Operand Field
    106
- CHAPTER 4 ASSEMBLER/DISASSEMBLER (Continued)
  106
  - Disassembled Source Line
    106
  - Mnemonics and Delimiters
    107
  - Addressing Modes
    108
  - Character Set
    108
- Cpu32Bug Assembler Addressing Modes
  109
  - Define Constant Directive (DC.W)
    111
  - System Call Directive (SYSCALL)
    112
- Entering and Modifying Source Program
  112
- Assembler Output/Program Listings
  114
Chapter 5 System Calls

115
- Introduction
  115
  - Executing System Calls through TRAP #15
    115
  - Input/Output String Formats
    116
- System Call Routines
  116
- Cpu32Bug System Call Routines
  117
  - Parse Value, Assign to Variable (.CHANGEV)
    119
  - Check for Break (.CHKBRK)
    121
  - Timer Delay Function (.DELAY)
    122
  - Unsigned 32 X 32 Bit Divide (.DIVU32)
    123
  - Erase Line (.ERASLN)
    124
  - Input Character Routine (.INCHR)
    125
  - Input Line Routine (.INLN)
    126
  - Input Serial Port Status (.INSTAT)
    127
  - Unsigned 32 X 32 Bit Multiply (.MULU32)
    128
  - Output Character Routine (.OUTCHR)
    129
  - Output String Using Pointers (.OUTLN/OUTSTR)
    130
  - Read Line to Fixed-Length Buffer (.READLN)
    132
  - Read String into Variable-Length Buffer (.READSTR)
    133
  - Return to Cpu32Bug (.RETURN)
    134
  - Send Break (.SNDBRK)
    135
  - Compare Two Strings (.STRCMP)
    136
  - Timer Initialization (.TM_INI)
    137
  - Read Timer (.TM_RD)
    138
  - Start Timer at T=0 (.TM_STR0)
    139
  - Output String with Data (.WRITD/WRITLN)
    141
  - Output String Using Character Count (.WRITE/WRITELN)
    143
Chapter 6 Diagnostic Firmware Guide

145
- Introduction
  145
- Diagnostic Monitor
  145
  - Command Entry and Directories
    145
  - Monitor Start-Up
    145
  - Help (HE)
    146
  - Loop-On-Error Mode (LE)
    146
  - Self Test (ST)
    146
  - Switch Directories (SD)
    146
  - Clear (Zero) Error Counters (ZE)
    147
  - Display Error Counters (DE)
    147
  - Display Pass Count (DP)
    147
  - Loop-Continue Mode (LC)
    147
  - Non-Verbose Mode (NV)
    147
  - Stop-On-Error Mode (SE)
    147
  - Zero Pass Count (ZP)
    148
- Utilities
  148
  - Write Loop
    148
  - Read Loop
    149
  - Write/Read Loop
    149
- CPU Tests for the MCU (CPU)
  150
  - MCU CPU Diagnostic Tests
    150
  - Register Test (CPU A)
    151
  - Instruction Test (CPU B)
    152
  - Address Mode Test (CPU C)
    153
  - Exception Processing Test (CPU D)
    154
- Memory Tests (MT)
  155
- Memory Diagnostic Tests
  155
  - Set Function Code (MT A)
    157
  - Set Start Address (MT B)
    158
  - Set Stop Address (MT C)
    159
  - Set Bus Data Width (MT D)
    160
  - March Address Test (MT E)
    161
  - Walk a Bit Test (MT F)
    162
  - Refresh Test (MT G)
    163
  - Random Byte Test (MT H)
    164
  - Program Test (MT I)
    165
  - Test and Set Test (MT J)
    166
- Bus Error Test (BERR)
  167
Appendix A S-Record Information

169
- Introduction
  169
- S-Record Content
  169
- S-Record Types
  170
- S-Records Creation
  171
Appendix B Self-Test Error Messages

173
- Introduction
  173
Appendix C User Customization

175
- Introduction
  175
- CPU32BUG Customization
  176
- Customization Table
  179
- C-1. Cpu32Bug Customization Area
  179
- Communication Formats
  188
- C-2. MCU SCI Communication Formats
  188
- BCC REV. a Chip Selection Summary
  189
- C-3. Rev. a Chip Selection Summary
  189
- BCC REV. B Chip Selection Summary
  190
- C-4. Rev. B Chip Selection Summary
  190
- BCC REV. C Chip Selection Summary
  191
- C-5. BCC Rev. C Chip Selection Summary
  191
- Platform Board (PFB) REV. C Compatibility
  192
- C-6. PFB Rev. C Compatibility
  192
- CPU32BUG Questions and Answers
  193

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