Table of Contents
Advertisement
L8r31072
A
change
in output
power
is
sensed
by
D252
causing the base voltage of q254
to
change
accordingly.
For example, if
the
output power increases, the base of
Q254
goes more
positlve, causing it to
increase
conduction which lowers its
col
lector volt-
age.
Q254
controls
Q255,
therefore as
Q254
increases conduction,
Q255 decreases con-
duction.
This raises the voltage applied
to the
ba
se of Q256. Tbe conduction of
Q256
Cecreases
proportionally,
lowering
the
base
voltage of pass transistor Q257.
The
resulting
decrease in conduction of
Q257
lowers the col lector
voltage of driver
q252, tberetry lowering the output
power
in
proport
ion to the excessive power ori gin-
a1ly
sensed
by the
base
circuit of
Q254.
RECE
I
VER
The receivers are dual conversion,
superheterodyne
FI\'I
receivers designed for
one-frequency operation in Ihe
42O-572
\lHz
frequency range. A regulated 8.5 volts is
used
for all receiver stages except for
the
audio PA IC, whjch operates from the
A+
supply.
'The receiver has intermediate
fre-
quencies
of 21.4
liHz and 455
kHz.
Adjacent
channel selectivity
is obtained by
using
two band-pass filters:
a 21.4
MHz
crystal
fi
I
ter
and
a
455 kHz ceramic
fi
1
ter.
Al1 of the receiver circuitry
except
the
osci
1
1a
tor
is
mounted on
the
transmit
ter/receiver
(Tx/Rx) board.
The
receiver consists of:
Receiver Front
End
21
.4
MiHz
1st IF circuitry
1st
and 2nd
Oscillators
455 kHz 2nd
IF circuitry
with
FM
Detector
Audio
PA
Circuitry
Squel
ch
Ci
rcui
t
ry
RECE]VER FFONT
ENI)
An RF
signa
1 from the antenna is
conpled through antenna relay
K601
and
two
helical resonators (L401 and L4A2) to
the
t'ase of
RF
amplifier Q401. The output of
Q401
is coupled through three
more
helical
resonators consisting of
L4O5-L4O7
to
the
gate of 1st Mixer Q402. The front end
se-
lectivity
is provided by the five helical
resona
tors.
OSCILLATOR
&
IVIULTIPLIER
Q301
, Y301
a
nd
a
ssocia
ted
ci
rcui try
make up a Colpitts-oscillator.
The
o
frequency is control led by a third
mode
crystal
operateci at one ninth
of
the
required injeetion
frequency.
Voltage-
variable capacitor
D301, L301 and Y301 are
connected
in series to provide
compensati-on
capability.
The compensation
voltage
used
to control the transmitter oscillators
is
applied to D301 to maintain stability.
L301 is adjustable to set the oscillator
frequency.
R301
is in parallel with
Y301
to insure operation on the third
overtone
of the crystal.
The
output of
Q301
is coupled
through
C304
to the emitter of buffer Q302.
The
output of
Q302
is coupled through
P301 to
two tuned circuits
(L351 and L352) on the
Tx/Rx board.
L351 and L352 are tuned
to
the third barmonic of the oscillator
fre-
quency which is applied to the base of
Q351.
The output of tripler
A351 is
coupled to the source input of mixer
Q402
through helical resonators L354 and
L355.
L354 and L355 are tuned to the operating
frequency minus 27.4
MHz
which is the ninth
nultiple of the crystal
frequency.
The DC leve1 of
the osci
1
Iator /
multiplier
chain
can be monitored
at
TP351.
The
meter reading at this point is typical-
ly 0.8 VDC. The RF frequency from
the
oscillator/multiplier
chain and input level
to the mixer
can be
measured
at TP401.
The
meter reading at
TP401
is typically
0.5 to
1 volts as
measured
using the Rx
RF Detec-
tor
Probe.
1ST
I{IXER
The
1st mixer
uses
a
FET (Q402)
as
the
active device.
The
FET
mixer provides
a
high input
impedance,
high power gain
and
an output relatively
free of intermodula-
tion products).
In the mixer stage,
RF
from the front
end helical filter
is applied to the
gate
of the mixer.
Injection voltage from
the
multiplier
stages is applied to the
source
of the mixer.
The 21.4
MHz
mixer 1st lF
output signal is coupled frorn the drain of
Q402
through an
impedance
matching
network
(L409 and
C410-C413
) to crysta 1 filter
2501.
The highly-selective
crystal
filter
provides the first
portion of the receiver
IF selectivity.
The output of tLre filter
is coupled through
impedance-matching
net-
work L501
to the 1st IF amplifier.
IST &
2ND
IF
&
DETECTOR
STAGES
1st IF Amplifier
e501 is dual-gate
I{OSFET. The crystal filter
output is
ap-
plied to Gate 1 of the amplifier,
and
the
ampli-fied signal is taken from the drain.
The biasing on Gate 2 and the drain
load
determines the gain of the stage.
The
CIRCUIT
ANALYSIS
Advertisement
Table of Contents
